KR100439924B1 - 반도체 메모리 집적 회로 - Google Patents

반도체 메모리 집적 회로 Download PDF

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Publication number
KR100439924B1
KR100439924B1 KR10-2001-0029680A KR20010029680A KR100439924B1 KR 100439924 B1 KR100439924 B1 KR 100439924B1 KR 20010029680 A KR20010029680 A KR 20010029680A KR 100439924 B1 KR100439924 B1 KR 100439924B1
Authority
KR
South Korea
Prior art keywords
transistor
address
pulse
stage decoder
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-2001-0029680A
Other languages
English (en)
Korean (ko)
Other versions
KR20010109145A (ko
Inventor
다까기와데루오
마스다마사미
Original Assignee
가부시끼가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 가부시끼가이샤 도시바 filed Critical 가부시끼가이샤 도시바
Publication of KR20010109145A publication Critical patent/KR20010109145A/ko
Application granted granted Critical
Publication of KR100439924B1 publication Critical patent/KR100439924B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/83Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption
    • G11C29/832Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption with disconnection of faulty elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/781Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/06Address interface arrangements, e.g. address buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Pulse Circuits (AREA)
KR10-2001-0029680A 2000-05-30 2001-05-29 반도체 메모리 집적 회로 Expired - Fee Related KR100439924B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000-159480 2000-05-30
JP2000159480A JP4156781B2 (ja) 2000-05-30 2000-05-30 半導体メモリ集積回路

Publications (2)

Publication Number Publication Date
KR20010109145A KR20010109145A (ko) 2001-12-08
KR100439924B1 true KR100439924B1 (ko) 2004-07-12

Family

ID=18663793

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2001-0029680A Expired - Fee Related KR100439924B1 (ko) 2000-05-30 2001-05-29 반도체 메모리 집적 회로

Country Status (3)

Country Link
US (1) US6501702B2 (enExample)
JP (1) JP4156781B2 (enExample)
KR (1) KR100439924B1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITRM20010298A1 (it) * 2001-05-31 2002-12-02 Micron Technology Inc Interfaccia di comando di utilizzatore con decodificatore programmabile.
KR100481179B1 (ko) * 2002-09-10 2005-04-07 삼성전자주식회사 퓨즈를 구비한 회로 및 이를 이용한 반도체 장치
JP2004152348A (ja) * 2002-10-29 2004-05-27 Renesas Technology Corp 信号生成回路
KR100615596B1 (ko) * 2004-12-22 2006-08-25 삼성전자주식회사 반도체 장치
US7263024B2 (en) * 2005-10-17 2007-08-28 Lattice Semiconductor Corporation Clock reset address decoder for block memory
JP5563183B2 (ja) 2007-02-15 2014-07-30 ピーエスフォー ルクスコ エスエイアールエル 半導体メモリ集積回路
US8861301B2 (en) 2012-06-08 2014-10-14 Freescale Semiconductor, Inc. Clocked memory with latching predecoder circuitry
US8743651B2 (en) 2012-06-08 2014-06-03 Freescale Semiconductor, Inc. Clocked memory with word line activation during a first portion of the clock cycle
US20150279451A1 (en) * 2014-03-27 2015-10-01 Qualcomm Incorporated Edge-triggered pulse latch
KR102816578B1 (ko) 2020-08-14 2025-06-04 삼성전자주식회사 듀티 조절 회로, 이를 포함하는 지연 동기 루프 회로 및 반도체 메모리 장치

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19980065498A (ko) * 1997-01-10 1998-10-15 김광호 반도체 메모리 장치의 로우 어드레스 제어 회로
JP2000030463A (ja) * 1998-07-13 2000-01-28 Mitsubishi Electric Corp 同期型半導体記憶装置
JP2000132968A (ja) * 1998-10-28 2000-05-12 Hitachi Ltd 半導体集積回路装置
KR100257867B1 (ko) * 1997-11-15 2000-06-01 윤종용 2차 캐시를 구비한 시스템 장치 및 동기형 메모리 장치

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4117944B2 (ja) 1998-07-31 2008-07-16 富士通株式会社 半導体記憶装置
KR100313515B1 (ko) * 1999-07-26 2001-11-15 김영환 반도체 메모리의 칼럼 구제 회로

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19980065498A (ko) * 1997-01-10 1998-10-15 김광호 반도체 메모리 장치의 로우 어드레스 제어 회로
KR100257867B1 (ko) * 1997-11-15 2000-06-01 윤종용 2차 캐시를 구비한 시스템 장치 및 동기형 메모리 장치
JP2000030463A (ja) * 1998-07-13 2000-01-28 Mitsubishi Electric Corp 同期型半導体記憶装置
JP2000132968A (ja) * 1998-10-28 2000-05-12 Hitachi Ltd 半導体集積回路装置

Also Published As

Publication number Publication date
US6501702B2 (en) 2002-12-31
JP2001344978A (ja) 2001-12-14
KR20010109145A (ko) 2001-12-08
US20010048632A1 (en) 2001-12-06
JP4156781B2 (ja) 2008-09-24

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