KR100398996B1 - 반도체 장치의 제조 방법 - Google Patents
반도체 장치의 제조 방법 Download PDFInfo
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- KR100398996B1 KR100398996B1 KR10-2001-0005855A KR20010005855A KR100398996B1 KR 100398996 B1 KR100398996 B1 KR 100398996B1 KR 20010005855 A KR20010005855 A KR 20010005855A KR 100398996 B1 KR100398996 B1 KR 100398996B1
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- 238000004519 manufacturing process Methods 0.000 title claims description 63
- 239000004065 semiconductor Substances 0.000 title claims description 58
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- 229920006395 saturated elastomer Polymers 0.000 description 2
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- SJECZPVISLOESU-UHFFFAOYSA-N 3-trimethoxysilylpropan-1-amine Chemical compound CO[Si](OC)(OC)CCCN SJECZPVISLOESU-UHFFFAOYSA-N 0.000 description 1
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- 229950010030 dl-alanine Drugs 0.000 description 1
- NKSJNEHGWDZZQF-UHFFFAOYSA-N ethenyl(trimethoxy)silane Chemical compound CO[Si](OC)(OC)C=C NKSJNEHGWDZZQF-UHFFFAOYSA-N 0.000 description 1
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- 150000002391 heterocyclic compounds Chemical class 0.000 description 1
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- 229910021645 metal ion Inorganic materials 0.000 description 1
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- 230000035515 penetration Effects 0.000 description 1
- 150000004965 peroxy acids Chemical class 0.000 description 1
- 239000010452 phosphate Substances 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 150000003141 primary amines Chemical class 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 235000019260 propionic acid Nutrition 0.000 description 1
- 125000001453 quaternary ammonium group Chemical group 0.000 description 1
- IUVKMZGDUIUOCP-BTNSXGMBSA-N quinbolone Chemical compound O([C@H]1CC[C@H]2[C@H]3[C@@H]([C@]4(C=CC(=O)C=C4CC3)C)CC[C@@]21C)C1=CCCC1 IUVKMZGDUIUOCP-BTNSXGMBSA-N 0.000 description 1
- 229940043230 sarcosine Drugs 0.000 description 1
- 150000003335 secondary amines Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
- 239000001384 succinic acid Substances 0.000 description 1
- RVEZZJVBDQCTEF-UHFFFAOYSA-N sulfenic acid Chemical compound SO RVEZZJVBDQCTEF-UHFFFAOYSA-N 0.000 description 1
- BUUPQKDIAURBJP-UHFFFAOYSA-N sulfinic acid Chemical compound OS=O BUUPQKDIAURBJP-UHFFFAOYSA-N 0.000 description 1
- QAOWNCQODCNURD-UHFFFAOYSA-N sulfuric acid Substances OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 150000003512 tertiary amines Chemical class 0.000 description 1
- 150000003566 thiocarboxylic acids Chemical class 0.000 description 1
- 229910021642 ultra pure water Inorganic materials 0.000 description 1
- 239000012498 ultrapure water Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
- H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/42—Stripping or agents therefor
- G03F7/422—Stripping or agents therefor using liquids only
- G03F7/426—Stripping or agents therefor using liquids only containing organic halogen compounds; containing organic sulfonic acids or salts thereof; containing sulfoxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
실시예 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | ||
화학 약품의 조성중량% | (a) | 포름산 | 10 | |||||||
옥살산 | 3 | 3 | 3 | 3 | ||||||
말론산 | 10 | 10 | ||||||||
타르타르산 | 60 | |||||||||
(b) | 물 | 50 | 70 | 40 | 69.9 | 40 | 35 | 69.9 | 69.9 | |
(c) | 디메틸포름아미드 | 40 | ||||||||
N-메탈-2-피롤리돈 | 50 | 49.95 | ||||||||
디메틸술폭사이드 | ||||||||||
디에틸렌글리콜모노부틸에테르 | 27 | 27 | 4.9 | 27 | 27 | |||||
(d) | 비닐트리메톡시실란 | 0.1 | 0.05 | 0.1 | ||||||
헥사메틸디실란 | 0.1 | |||||||||
아미노프로필트리메톡시실란 | 0.1 | |||||||||
화학 약품의 pH | 2.5 | 1.4 | 1.5 | 1.4 | 1.5 | 0.2 | 1.4 | 1.4 | ||
평가 | 레지스트 잔사 제거성 | 양호 | 양호 | 양호 | 양호 | 양호 | 양호 | 양호 | 양호 | |
Al 배선의 가늘어짐㎚ | A | C | A | B | A | B | B | A | ||
W 플러그의 소실 유무 | 무 | 무 | 무 | 무 | 무 | 무 | 무 | 무 |
비교예 | 1 | 2 | 3 | ||
화학 약품의 조성중량% | 모노에탄올아민 | 70 | |||
히드록시아민 | 17.5 | ||||
에틸아미노에탄올 | 89 | ||||
아미모에폭시에탄올 | 60 | ||||
(a) | 프탈산 | 3 | |||
(b) | 물 | 5 | 17.5 | ||
(c) | 디메틸술폭사이드 | 27 | |||
벤조트리아졸 | 1 | ||||
피로카테콜 | 5 | 5 | |||
화학 약품의 pH | 13.5 | 13.9 | 12 | ||
평가 | 레지스트 잔사 제거성 | 불량 | 불량 | 불량 | |
Al 배선의 가늘어짐㎚ | A | C | A | ||
W 플러그의 소실 유무 | 무 | 유 | 유 |
Claims (3)
- 기판 상에 있어서 하지층 상에 알루미늄막, 텅스텐막 또는 구리막을 형성하는 공정과, 상기 알루미늄막, 텅스텐막 또는 구리막으로부터 레지스트를 이용한 사진 제판에 의해 알루미늄막, 텅스텐막 또는 구리막의 패턴을 형성하는 공정과, 상기 알루미늄막, 텅스텐막 또는 구리막의 패턴 형성에 이어서, 유기산 또는 그 염 0.01wt% 이상 90wt% 이하와, 물 2wt% 이상 74wt% 이하를 함유하고, pH가 8 미만인 화학 약품에 의해 상기 레지스트, 및/또는, 애싱 후의 레지스트 잔사를 제거하는 공정을 포함하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 기판 상에 있어서 하지층 상에 알루미늄막, 텅스텐막 또는 구리막을 형성하는 공정과, 상기 알루미늄막, 텅스텐막 또는 구리막으로부터 레지스트 마스크를 이용한 사진 제판에 의해 알루미늄막, 텅스텐막 또는 구리막의 패턴을 형성하는 공정과, 상기 알루미늄막, 텅스텐막 또는 구리막의 패턴 상에 층간 절연막을 형성하는 공정과, 다른 레지스트 마스크를 이용한 사진 제판에 의해 상기 층간 절연막 중에 상기 알루미늄막, 텅스텐막 또는 구리막의 패턴에 도달하는 홀 패턴을 형성하는 공정과, 상기 홀 패턴의 형성에 이어서, 유기산 또는 그 염 0.01wt% 이상 90wt% 이하와, 물 2wt% 이상 74wt% 이하를 함유하고, pH가 8 미만인 화학 약품에 의해 레지스트, 및/또는, 애싱 후의 레지스트 잔사를 제거하는 처리 공정을 포함하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 기판 상에 있어서 하지층 상에 복합 메탈막을 형성하는 공정과, 상기 복합 메탈막으로부터 레지스트 마스크를 이용한 사진 제판에 의해 복합 메탈막 패턴을 형성하는 공정과, 상기 복합 메탈막 패턴 형성에 이어서, 유기산 또는 그 염 0.01% 이상 90% 이하와, 물 2wt% 이상 74wt% 이하를 함유하고, pH가 8 미만인 화학 약품에 의해 상기 레지스트, 및/또는, 애싱 후의 레지스트 잔사를 제거하는 공정을 포함하는 것을 특징으로 하는 반도체 장치의 제조 방법.
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JP2000180198 | 2000-06-15 | ||
JP2000-180198 | 2000-06-15 | ||
JP2000-224529 | 2000-07-25 | ||
JP2000224529A JP2002075993A (ja) | 2000-06-15 | 2000-07-25 | 半導体装置の製造方法 |
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KR20010113000A KR20010113000A (ko) | 2001-12-24 |
KR100398996B1 true KR100398996B1 (ko) | 2003-09-22 |
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US (1) | US6713232B2 (ko) |
JP (1) | JP2002075993A (ko) |
KR (1) | KR100398996B1 (ko) |
CN (1) | CN1263113C (ko) |
DE (1) | DE10064198A1 (ko) |
TW (1) | TWI295750B (ko) |
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KR100646793B1 (ko) * | 2001-11-13 | 2006-11-17 | 삼성전자주식회사 | 씬너 조성물 |
KR100869112B1 (ko) * | 2002-01-14 | 2008-11-17 | 삼성전자주식회사 | 반사형 액정표시장치 및 그 제조 방법 |
US6864193B2 (en) * | 2003-03-05 | 2005-03-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Aqueous cleaning composition containing copper-specific corrosion inhibitor |
KR100634401B1 (ko) * | 2004-08-03 | 2006-10-16 | 삼성전자주식회사 | 반도체 제조공정의 기판 처리 방법 |
US20070184666A1 (en) * | 2006-02-08 | 2007-08-09 | Texas Instruments Inc. | Method for removing residue containing an embedded metal |
JP2012058273A (ja) * | 2010-09-03 | 2012-03-22 | Kanto Chem Co Inc | フォトレジスト残渣およびポリマー残渣除去液組成物 |
KR102427699B1 (ko) | 2015-04-27 | 2022-08-01 | 삼성전자주식회사 | 포토레지스트 제거용 조성물 및 이를 이용한 반도체 장치의 제조 방법 |
KR102684831B1 (ko) * | 2019-06-27 | 2024-07-12 | 카오카부시키가이샤 | 세정 방법 |
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- 2000-12-22 DE DE10064198A patent/DE10064198A1/de not_active Withdrawn
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2001
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- 2001-02-07 KR KR10-2001-0005855A patent/KR100398996B1/ko not_active IP Right Cessation
- 2001-02-07 CN CNB011034882A patent/CN1263113C/zh not_active Expired - Lifetime
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US6713232B2 (en) | 2004-03-30 |
JP2002075993A (ja) | 2002-03-15 |
CN1330402A (zh) | 2002-01-09 |
KR20010113000A (ko) | 2001-12-24 |
DE10064198A1 (de) | 2002-01-03 |
CN1263113C (zh) | 2006-07-05 |
TWI295750B (ko) | 2008-04-11 |
US20020012882A1 (en) | 2002-01-31 |
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