KR100381769B1 - 자체정렬된소스와드레인영역및전계효과트랜지스터형성방법과이를위한저손실도핑방법및그구조체 - Google Patents
자체정렬된소스와드레인영역및전계효과트랜지스터형성방법과이를위한저손실도핑방법및그구조체 Download PDFInfo
- Publication number
- KR100381769B1 KR100381769B1 KR10-1998-0700002A KR19980700002A KR100381769B1 KR 100381769 B1 KR100381769 B1 KR 100381769B1 KR 19980700002 A KR19980700002 A KR 19980700002A KR 100381769 B1 KR100381769 B1 KR 100381769B1
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- impurity
- source
- substrate
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
- H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
- H10P32/1414—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
- H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US8/498,028 | 1995-07-03 | ||
| US08/498,028 US5976939A (en) | 1995-07-03 | 1995-07-03 | Low damage doping technique for self-aligned source and drain regions |
| US08/498,028 | 1995-07-03 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR19990028704A KR19990028704A (ko) | 1999-04-15 |
| KR100381769B1 true KR100381769B1 (ko) | 2003-08-19 |
Family
ID=23979326
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-1998-0700002A Expired - Fee Related KR100381769B1 (ko) | 1995-07-03 | 1996-07-01 | 자체정렬된소스와드레인영역및전계효과트랜지스터형성방법과이를위한저손실도핑방법및그구조체 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US5976939A (enExample) |
| EP (1) | EP0838085A4 (enExample) |
| JP (1) | JPH11509042A (enExample) |
| KR (1) | KR100381769B1 (enExample) |
| AU (1) | AU6406796A (enExample) |
| CA (1) | CA2225926A1 (enExample) |
| TW (1) | TW306047B (enExample) |
| WO (1) | WO1997002594A1 (enExample) |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0853815A4 (en) * | 1995-10-04 | 1999-10-27 | Intel Corp | DOPE GLASS SOURCE AND DRAIN REGION FORMATION |
| JP3107157B2 (ja) * | 1998-04-20 | 2000-11-06 | 日本電気株式会社 | 半導体装置およびその製造方法 |
| US6232165B1 (en) * | 1998-12-09 | 2001-05-15 | Winbond Electronics Corporation | Buried guard rings and method for forming the same |
| US6133131A (en) * | 1999-04-19 | 2000-10-17 | United Microelectronics Corp. | Method of forming a gate spacer on a semiconductor wafer |
| US6329273B1 (en) * | 1999-10-29 | 2001-12-11 | Advanced Micro Devices, Inc. | Solid-source doping for source/drain to eliminate implant damage |
| JP2001127271A (ja) * | 1999-10-29 | 2001-05-11 | Nec Corp | 半導体製造装置の製造方法 |
| US6265274B1 (en) * | 1999-11-01 | 2001-07-24 | United Microelectronics Corp. | Method of a metal oxide semiconductor on a semiconductor wafer |
| KR20010066122A (ko) * | 1999-12-31 | 2001-07-11 | 박종섭 | 반도체 소자의 폴리사이드 듀얼 게이트 형성 방법 |
| US6703688B1 (en) | 2001-03-02 | 2004-03-09 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
| US6830976B2 (en) | 2001-03-02 | 2004-12-14 | Amberwave Systems Corproation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
| US6506650B1 (en) * | 2001-04-27 | 2003-01-14 | Advanced Micro Devices, Inc. | Method of fabrication based on solid-phase epitaxy for a MOSFET transistor with a controlled dopant profile |
| WO2003025984A2 (en) | 2001-09-21 | 2003-03-27 | Amberwave Systems Corporation | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same |
| AU2002341803A1 (en) | 2001-09-24 | 2003-04-07 | Amberwave Systems Corporation | Rf circuits including transistors having strained material layers |
| US6730556B2 (en) * | 2001-12-12 | 2004-05-04 | Texas Instruments Incorporated | Complementary transistors with controlled drain extension overlap |
| US6849528B2 (en) * | 2001-12-12 | 2005-02-01 | Texas Instruments Incorporated | Fabrication of ultra shallow junctions from a solid source with fluorine implantation |
| US6891266B2 (en) * | 2002-02-14 | 2005-05-10 | Mia-Com | RF transition for an area array package |
| US6995430B2 (en) | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
| US6946371B2 (en) | 2002-06-10 | 2005-09-20 | Amberwave Systems Corporation | Methods of fabricating semiconductor structures having epitaxially grown source and drain elements |
| US6982474B2 (en) | 2002-06-25 | 2006-01-03 | Amberwave Systems Corporation | Reacted conductive gate electrodes |
| US6686247B1 (en) * | 2002-08-22 | 2004-02-03 | Intel Corporation | Self-aligned contacts to gates |
| US6911695B2 (en) * | 2002-09-19 | 2005-06-28 | Intel Corporation | Transistor having insulating spacers on gate sidewalls to reduce overlap between the gate and doped extension regions of the source and drain |
| CN100383935C (zh) * | 2002-11-22 | 2008-04-23 | 南亚科技股份有限公司 | 源极/漏极元件的制造方法 |
| CN100437970C (zh) | 2003-03-07 | 2008-11-26 | 琥珀波系统公司 | 一种结构及用于形成半导体结构的方法 |
| US7122408B2 (en) * | 2003-06-16 | 2006-10-17 | Micron Technology, Inc. | Photodiode with ultra-shallow junction for high quantum efficiency CMOS image sensor and method of formation |
| KR100672679B1 (ko) * | 2004-12-30 | 2007-01-22 | 동부일렉트로닉스 주식회사 | 시모스 이미지 센서의 광감지 소자 및 그의 제조방법 |
| US7271044B2 (en) * | 2005-07-21 | 2007-09-18 | International Business Machines Corporation | CMOS (complementary metal oxide semiconductor) technology |
| US7648871B2 (en) * | 2005-10-21 | 2010-01-19 | International Business Machines Corporation | Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabricating same |
| EP2072971A1 (en) | 2007-12-17 | 2009-06-24 | Services Pétroliers Schlumberger | Variable throat venturi flow meter |
| US8796124B2 (en) | 2011-10-25 | 2014-08-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Doping method in 3D semiconductor device |
| US8574995B2 (en) | 2011-11-10 | 2013-11-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Source/drain doping method in 3D devices |
| US9455368B2 (en) * | 2014-07-03 | 2016-09-27 | Varian Semiconductor Equipment Associates, Inc. | Method of forming an interdigitated back contact solar cell |
| CN109216273A (zh) | 2017-07-06 | 2019-01-15 | 联华电子股份有限公司 | 半导体结构及其制造方法 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63302518A (ja) * | 1987-06-02 | 1988-12-09 | Fujitsu Ltd | 半導体装置の製造方法 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3095564B2 (ja) * | 1992-05-29 | 2000-10-03 | 株式会社東芝 | 半導体装置及び半導体装置の製造方法 |
| JPS5946107B2 (ja) * | 1975-06-04 | 1984-11-10 | 株式会社日立製作所 | Mis型半導体装置の製造法 |
| JPS54147789A (en) * | 1978-05-11 | 1979-11-19 | Matsushita Electric Ind Co Ltd | Semiconductor divice and its manufacture |
| JPS57141966A (en) * | 1981-02-26 | 1982-09-02 | Seiko Epson Corp | Manufacture of semiconductor device |
| JPS61279129A (ja) * | 1985-06-04 | 1986-12-09 | Nec Corp | 半導体装置の拡散領域形成方法 |
| JPS63169047A (ja) * | 1987-01-06 | 1988-07-13 | Yamaguchi Nippon Denki Kk | 半導体装置 |
| JPH01123417A (ja) * | 1987-11-07 | 1989-05-16 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JPH01207932A (ja) * | 1988-02-16 | 1989-08-21 | Fuji Electric Co Ltd | 半導体装置 |
| US5079180A (en) * | 1988-12-22 | 1992-01-07 | Texas Instruments Incorporated | Method of fabricating a raised source/drain transistor |
| DE4013929C2 (de) * | 1989-05-02 | 1995-12-07 | Toshiba Kawasaki Kk | Verfahren zum Einbringen von Störstoffen in eine Halbleitermaterial-Schicht beim Herstellen eines Halbleiterbauelements und Anwendung des Verfahrens |
| US5234850A (en) * | 1990-09-04 | 1993-08-10 | Industrial Technology Research Institute | Method of fabricating a nitride capped MOSFET for integrated circuits |
| US5518945A (en) * | 1995-05-05 | 1996-05-21 | International Business Machines Corporation | Method of making a diffused lightly doped drain device with built in etch stop |
| US5504031A (en) * | 1995-07-03 | 1996-04-02 | Taiwan Semiconductor Manufacturing Company Ltd. | Elevated source/drain with solid phase diffused source/drain extension for deep sub-micron mosfets |
-
1995
- 1995-07-03 US US08/498,028 patent/US5976939A/en not_active Expired - Lifetime
-
1996
- 1996-07-01 KR KR10-1998-0700002A patent/KR100381769B1/ko not_active Expired - Fee Related
- 1996-07-01 AU AU64067/96A patent/AU6406796A/en not_active Abandoned
- 1996-07-01 JP JP9505275A patent/JPH11509042A/ja active Pending
- 1996-07-01 WO PCT/US1996/011184 patent/WO1997002594A1/en not_active Ceased
- 1996-07-01 CA CA002225926A patent/CA2225926A1/en not_active Abandoned
- 1996-07-01 EP EP96923594A patent/EP0838085A4/en not_active Withdrawn
- 1996-07-19 TW TW085108829A patent/TW306047B/zh active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63302518A (ja) * | 1987-06-02 | 1988-12-09 | Fujitsu Ltd | 半導体装置の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH11509042A (ja) | 1999-08-03 |
| AU6406796A (en) | 1997-02-05 |
| US5976939A (en) | 1999-11-02 |
| KR19990028704A (ko) | 1999-04-15 |
| EP0838085A1 (en) | 1998-04-29 |
| WO1997002594A1 (en) | 1997-01-23 |
| TW306047B (enExample) | 1997-05-21 |
| CA2225926A1 (en) | 1997-01-23 |
| EP0838085A4 (en) | 1998-10-28 |
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