KR100374455B1 - 평면 트렌치의 제조 방법 - Google Patents
평면 트렌치의 제조 방법 Download PDFInfo
- Publication number
- KR100374455B1 KR100374455B1 KR10-1999-7008655A KR19997008655A KR100374455B1 KR 100374455 B1 KR100374455 B1 KR 100374455B1 KR 19997008655 A KR19997008655 A KR 19997008655A KR 100374455 B1 KR100374455 B1 KR 100374455B1
- Authority
- KR
- South Korea
- Prior art keywords
- trench
- layer
- insulating
- polysilicon
- polysilicon layer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/763—Polycrystalline semiconductor regions
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Element Separation (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9701154A SE520115C2 (sv) | 1997-03-26 | 1997-03-26 | Diken med plan ovansida |
SE9701154-8 | 1997-03-26 | ||
PCT/SE1998/000528 WO1998043293A1 (en) | 1997-03-26 | 1998-03-23 | Method for producing planar trenches |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20010005591A KR20010005591A (ko) | 2001-01-15 |
KR100374455B1 true KR100374455B1 (ko) | 2003-03-04 |
Family
ID=20406360
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-1999-7008655A KR100374455B1 (ko) | 1997-03-26 | 1998-03-23 | 평면 트렌치의 제조 방법 |
Country Status (9)
Country | Link |
---|---|
EP (1) | EP1018156A1 (sv) |
JP (1) | JP2001519097A (sv) |
KR (1) | KR100374455B1 (sv) |
CN (1) | CN1110848C (sv) |
AU (1) | AU6753998A (sv) |
CA (1) | CA2285627A1 (sv) |
SE (1) | SE520115C2 (sv) |
TW (1) | TW356579B (sv) |
WO (1) | WO1998043293A1 (sv) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6498383B2 (en) * | 2001-05-23 | 2002-12-24 | International Business Machines Corporation | Oxynitride shallow trench isolation and method of formation |
US6461936B1 (en) * | 2002-01-04 | 2002-10-08 | Infineon Technologies Ag | Double pullback method of filling an isolation trench |
JP2008028357A (ja) * | 2006-07-24 | 2008-02-07 | Hynix Semiconductor Inc | 半導体素子及びその製造方法 |
JP4717122B2 (ja) * | 2009-01-13 | 2011-07-06 | 三菱電機株式会社 | 薄膜太陽電池の製造方法 |
CN102468176B (zh) * | 2010-11-19 | 2013-12-18 | 上海华虹Nec电子有限公司 | 超级结器件制造纵向区的方法 |
CN103822735A (zh) * | 2012-11-16 | 2014-05-28 | 无锡华润上华半导体有限公司 | 一种压力传感器用晶片结构及该晶片结构的加工方法 |
CN107507773B (zh) * | 2016-06-14 | 2021-09-17 | 格科微电子(上海)有限公司 | 优化cmos图像传感器晶体管结构的方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2207281B (en) * | 1987-07-24 | 1992-02-05 | Plessey Co Plc | A method of providing refilled trenches |
US5175122A (en) * | 1991-06-28 | 1992-12-29 | Digital Equipment Corporation | Planarization process for trench isolation in integrated circuit manufacture |
US5561073A (en) * | 1992-03-13 | 1996-10-01 | Jerome; Rick C. | Method of fabricating an isolation trench for analog bipolar devices in harsh environments |
US5627092A (en) * | 1994-09-26 | 1997-05-06 | Siemens Aktiengesellschaft | Deep trench dram process on SOI for low leakage DRAM cell |
US5683945A (en) * | 1996-05-16 | 1997-11-04 | Siemens Aktiengesellschaft | Uniform trench fill recess by means of isotropic etching |
-
1997
- 1997-03-26 SE SE9701154A patent/SE520115C2/sv not_active IP Right Cessation
- 1997-04-18 TW TW086105057A patent/TW356579B/zh active
-
1998
- 1998-03-23 CA CA002285627A patent/CA2285627A1/en not_active Abandoned
- 1998-03-23 EP EP98912851A patent/EP1018156A1/en not_active Withdrawn
- 1998-03-23 AU AU67539/98A patent/AU6753998A/en not_active Abandoned
- 1998-03-23 KR KR10-1999-7008655A patent/KR100374455B1/ko not_active IP Right Cessation
- 1998-03-23 WO PCT/SE1998/000528 patent/WO1998043293A1/en active IP Right Grant
- 1998-03-23 JP JP54556198A patent/JP2001519097A/ja not_active Abandoned
- 1998-03-23 CN CN98805442A patent/CN1110848C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
SE9701154L (sv) | 1998-09-27 |
SE9701154D0 (sv) | 1997-03-26 |
WO1998043293A1 (en) | 1998-10-01 |
AU6753998A (en) | 1998-10-20 |
CA2285627A1 (en) | 1998-10-01 |
KR20010005591A (ko) | 2001-01-15 |
TW356579B (en) | 1999-04-21 |
EP1018156A1 (en) | 2000-07-12 |
CN1257609A (zh) | 2000-06-21 |
JP2001519097A (ja) | 2001-10-16 |
CN1110848C (zh) | 2003-06-04 |
SE520115C2 (sv) | 2003-05-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100258653B1 (ko) | 집적 회로의 실리콘층 내에 매립된 분리 부재 및 그의 형성 방법 | |
US4791073A (en) | Trench isolation method for semiconductor devices | |
JP2812811B2 (ja) | 半導体装置のフィールド酸化膜形成方法 | |
JP3202460B2 (ja) | 半導体装置およびその製造方法 | |
US5374583A (en) | Technology for local oxidation of silicon | |
US6069032A (en) | Salicide process | |
KR100374455B1 (ko) | 평면 트렌치의 제조 방법 | |
KR19990044820A (ko) | 폴리실리콘 피복 스와미(측벽 마스크화 절연) | |
KR19990088449A (ko) | 열적산화물이채워진얕은트렌치고립 | |
US7402487B2 (en) | Process for fabricating a semiconductor device having deep trench structures | |
US6063693A (en) | Planar trenches | |
EP1009024B1 (en) | Method for producing an SOI wafer | |
JP2616134B2 (ja) | Soiトランジスタ積層半導体装置とその製造方法 | |
KR19990066454A (ko) | 반도체 장치의 트렌치 격리 형성 방법 | |
US6444539B1 (en) | Method for producing a shallow trench isolation filled with thermal oxide | |
US6316330B1 (en) | Method of fabricating a shallow trench isolation semiconductor device | |
JPH02143527A (ja) | 配線形成方法 | |
US6268267B1 (en) | Silicon-oxynitride-oxide (SXO) continuity film pad to recessed bird's beak of LOCOS | |
TW415017B (en) | Method of improving trench isolation | |
KR100190070B1 (ko) | 반도체장치의 소자분리 방법 | |
KR100532755B1 (ko) | 섀로우 트랜치 분리막 형성 방법 | |
KR100214530B1 (ko) | 트렌치 소자격리구조 형성방법 | |
JP2914416B2 (ja) | 半導体装置の製造方法 | |
KR100207531B1 (ko) | 질소가 인-사이튜 도핑된 폴리실리콘 스페이서를 이용한 반도체장치의 소자분리방법 | |
KR960016230B1 (ko) | 단차비가 감소된 반도체 소자의 콘택홀 형성방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20060201 Year of fee payment: 4 |
|
LAPS | Lapse due to unpaid annual fee |