KR100315530B1 - 퓨즈-리프레쉬-회로 - Google Patents

퓨즈-리프레쉬-회로 Download PDF

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Publication number
KR100315530B1
KR100315530B1 KR1019970036911A KR19970036911A KR100315530B1 KR 100315530 B1 KR100315530 B1 KR 100315530B1 KR 1019970036911 A KR1019970036911 A KR 1019970036911A KR 19970036911 A KR19970036911 A KR 19970036911A KR 100315530 B1 KR100315530 B1 KR 100315530B1
Authority
KR
South Korea
Prior art keywords
fuse
circuit
refresh
pulse
latch
Prior art date
Application number
KR1019970036911A
Other languages
English (en)
Korean (ko)
Other versions
KR19980018306A (ko
Inventor
뤼디거 브레데
도미니끄 사비냑
노르베르트 비르트
Original Assignee
칼 하인쯔 호르닝어
지멘스 악티엔게젤샤프트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 칼 하인쯔 호르닝어, 지멘스 악티엔게젤샤프트 filed Critical 칼 하인쯔 호르닝어
Publication of KR19980018306A publication Critical patent/KR19980018306A/ko
Application granted granted Critical
Publication of KR100315530B1 publication Critical patent/KR100315530B1/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G11C29/789—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes using non-volatile cells or latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation

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  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
KR1019970036911A 1996-08-01 1997-08-01 퓨즈-리프레쉬-회로 KR100315530B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19631130.6 1996-08-01
DE19631130A DE19631130C2 (de) 1996-08-01 1996-08-01 Fuse-Refresh-Schaltung

Publications (2)

Publication Number Publication Date
KR19980018306A KR19980018306A (ko) 1998-06-05
KR100315530B1 true KR100315530B1 (ko) 2002-02-28

Family

ID=7801524

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970036911A KR100315530B1 (ko) 1996-08-01 1997-08-01 퓨즈-리프레쉬-회로

Country Status (7)

Country Link
US (1) US5905687A (fr)
EP (1) EP0822496A3 (fr)
JP (1) JP3910691B2 (fr)
KR (1) KR100315530B1 (fr)
CN (1) CN1111867C (fr)
DE (1) DE19631130C2 (fr)
TW (1) TW336321B (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW407283B (en) * 1998-05-18 2000-10-01 Winbond Electronics Corp Embedded memory device and its burn-in method
DE19823687A1 (de) * 1998-05-27 1999-12-09 Siemens Ag Fuselatch-Schaltung
ITRM20010105A1 (it) 2001-02-27 2002-08-27 Micron Technology Inc Circuito a fusibile per una cella di memoria flash.
WO2002069347A2 (fr) * 2001-02-27 2002-09-06 Micron Technology, Inc. Circuit-fusible de cellule flash
JP4790925B2 (ja) * 2001-03-30 2011-10-12 富士通セミコンダクター株式会社 アドレス発生回路
US6940773B2 (en) * 2003-04-02 2005-09-06 Infineon Technologies Ag Method and system for manufacturing DRAMs with reduced self-refresh current requirements
US6972613B2 (en) * 2003-09-08 2005-12-06 Infineon Technologies Ag Fuse latch circuit with non-disruptive re-interrogation
JP4115976B2 (ja) 2003-09-16 2008-07-09 株式会社東芝 半導体記憶装置
JP4376161B2 (ja) * 2004-02-05 2009-12-02 Ｏｋｉセミコンダクタ株式会社 冗長救済回路
US20060062198A1 (en) * 2004-09-17 2006-03-23 Shoei-Lai Chen Network wireless telephone system for MSN platform and method for applying the same
ITRM20070461A1 (it) * 2007-09-06 2009-03-07 Micron Technology Inc Acquisizione di dati di fusibili.

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4532607A (en) * 1981-07-22 1985-07-30 Tokyo Shibaura Denki Kabushiki Kaisha Programmable circuit including a latch to store a fuse's state
US4837520A (en) * 1985-03-29 1989-06-06 Honeywell Inc. Fuse status detection circuit
US4710934A (en) * 1985-11-08 1987-12-01 Texas Instruments Incorporated Random access memory with error correction capability
US5319592A (en) * 1992-11-25 1994-06-07 Fujitsu Limited Fuse-programming circuit
US5345110A (en) * 1993-04-13 1994-09-06 Micron Semiconductor, Inc. Low-power fuse detect and latch circuit
US5566107A (en) * 1995-05-05 1996-10-15 Micron Technology, Inc. Programmable circuit for enabling an associated circuit
KR0147194B1 (ko) * 1995-05-26 1998-11-02 문정환 반도체 메모리 소자
US5680360A (en) * 1995-06-06 1997-10-21 Integrated Device Technology, Inc. Circuits for improving the reliablity of antifuses in integrated circuits

Also Published As

Publication number Publication date
DE19631130C2 (de) 2000-08-17
EP0822496A2 (fr) 1998-02-04
JP3910691B2 (ja) 2007-04-25
KR19980018306A (ko) 1998-06-05
CN1111867C (zh) 2003-06-18
CN1186308A (zh) 1998-07-01
DE19631130A1 (de) 1998-02-05
TW336321B (en) 1998-07-11
EP0822496A3 (fr) 1998-03-25
JPH1069798A (ja) 1998-03-10
US5905687A (en) 1999-05-18

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