KR100288405B1 - 반도체 칩에 대한 전기적 접착 방법 및 그 장치 - Google Patents

반도체 칩에 대한 전기적 접착 방법 및 그 장치 Download PDF

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Publication number
KR100288405B1
KR100288405B1 KR1019930003127A KR930003127A KR100288405B1 KR 100288405 B1 KR100288405 B1 KR 100288405B1 KR 1019930003127 A KR1019930003127 A KR 1019930003127A KR 930003127 A KR930003127 A KR 930003127A KR 100288405 B1 KR100288405 B1 KR 100288405B1
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KR
South Korea
Prior art keywords
semiconductor chip
conductive material
conductive
insulating material
via hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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KR1019930003127A
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English (en)
Korean (ko)
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KR930020618A (ko
Inventor
하롤드이푸츠
Original Assignee
엘리 웨이스 , 알 비 레비
에이티 앤드 티 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 엘리 웨이스 , 알 비 레비, 에이티 앤드 티 코포레이션 filed Critical 엘리 웨이스 , 알 비 레비
Publication of KR930020618A publication Critical patent/KR930020618A/ko
Application granted granted Critical
Publication of KR100288405B1 publication Critical patent/KR100288405B1/ko
Anticipated expiration legal-status Critical
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/688—Flexible insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0344—Electroless sublayer, e.g. Ni, Co, Cd or Ag; Transferred electroless sublayer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0455—PTH for surface mount device [SMD], e.g. wherein solder flows through the PTH during mounting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing of the conductive pattern
    • H05K3/243—Reinforcing of the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/654—Top-view layouts
    • H10W70/655—Fan-out layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
KR1019930003127A 1992-03-04 1993-03-03 반도체 칩에 대한 전기적 접착 방법 및 그 장치 Expired - Lifetime KR100288405B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US845,898 1992-03-04
US07/845,898 US5355019A (en) 1992-03-04 1992-03-04 Devices with tape automated bonding

Publications (2)

Publication Number Publication Date
KR930020618A KR930020618A (ko) 1993-10-20
KR100288405B1 true KR100288405B1 (ko) 2001-05-02

Family

ID=25296360

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930003127A Expired - Lifetime KR100288405B1 (ko) 1992-03-04 1993-03-03 반도체 칩에 대한 전기적 접착 방법 및 그 장치

Country Status (5)

Country Link
US (1) US5355019A (enExample)
EP (1) EP0559384A3 (enExample)
JP (1) JP2823771B2 (enExample)
KR (1) KR100288405B1 (enExample)
TW (1) TW223182B (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995028005A2 (en) * 1994-04-07 1995-10-19 Vlsi Technology, Inc. Staggered pad array
JP3484554B2 (ja) * 1995-02-28 2004-01-06 日本テキサス・インスツルメンツ株式会社 半導体装置
JP3404446B2 (ja) * 1996-04-24 2003-05-06 シャープ株式会社 テープキャリアパッケージ及びそのテープキャリアパッケージを備えた液晶表示装置
GB2312988A (en) * 1996-05-10 1997-11-12 Memory Corp Plc Connecting a semiconductor die to a carrier
US5753976A (en) * 1996-06-14 1998-05-19 Minnesota Mining And Manufacturing Company Multi-layer circuit having a via matrix interlayer connection
JP3050807B2 (ja) 1996-06-19 2000-06-12 イビデン株式会社 多層プリント配線板
JP3050812B2 (ja) * 1996-08-05 2000-06-12 イビデン株式会社 多層プリント配線板
CN1059982C (zh) * 1997-08-28 2000-12-27 华通电脑股份有限公司 制造集成电路封装电路板的方法
JPH11238831A (ja) * 1997-12-16 1999-08-31 Shinko Electric Ind Co Ltd テープキャリア及びその製造方法
JP3846094B2 (ja) * 1998-03-17 2006-11-15 株式会社デンソー 半導体装置の製造方法
TW401632B (en) * 1998-03-26 2000-08-11 Fujitsu Ltd Resin molded semiconductor device and method of manufacturing semiconductor package
US7088002B2 (en) 2000-12-18 2006-08-08 Intel Corporation Interconnect
US7030472B2 (en) * 2004-04-01 2006-04-18 Agere Systems Inc. Integrated circuit device having flexible leadframe
US7829386B2 (en) * 2005-08-17 2010-11-09 General Electric Company Power semiconductor packaging method and structure
US7262444B2 (en) * 2005-08-17 2007-08-28 General Electric Company Power semiconductor packaging method and structure
JP4942629B2 (ja) * 2007-12-11 2012-05-30 三菱電機株式会社 電力用半導体モジュール

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2318592A (en) * 1940-02-24 1943-05-11 Du Pont Electrodeposition
US3868724A (en) * 1973-11-21 1975-02-25 Fairchild Camera Instr Co Multi-layer connecting structures for packaging semiconductor devices mounted on a flexible carrier
EP0452506A1 (en) * 1989-11-06 1991-10-23 Nippon Mektron, Ltd. METHOD OF PRODUCING A FLEXIBLE CIRCUIT BOARD FOR MOUNTING IC's

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Publication number Priority date Publication date Assignee Title
US3269861A (en) * 1963-06-21 1966-08-30 Day Company Method for electroless copper plating
US3832769A (en) * 1971-05-26 1974-09-03 Minnesota Mining & Mfg Circuitry and method
US3791848A (en) * 1972-05-19 1974-02-12 Western Electric Co A method of improving the adherence of a metal deposit to a polyimide surface
JPS5353766A (en) * 1976-10-26 1978-05-16 Suwa Seikosha Kk Tape carrier tape
JPS6046543B2 (ja) * 1978-09-11 1985-10-16 富士通株式会社 樹脂フイルムのスル−ホ−ル形成法
US4435740A (en) * 1981-10-30 1984-03-06 International Business Machines Corporation Electric circuit packaging member
JPS61111561A (ja) * 1984-10-05 1986-05-29 Fujitsu Ltd 半導体装置
GB8500906D0 (en) * 1985-01-15 1985-02-20 Prestwick Circuits Ltd Printed circuit boards
US4814855A (en) * 1986-04-29 1989-03-21 International Business Machines Corporation Balltape structure for tape automated bonding, multilayer packaging, universal chip interconnection and energy beam processes for manufacturing balltape
EP0293838A3 (en) * 1987-06-02 1989-09-06 Kabushiki Kaisha Toshiba Ic package for high-speed semiconductor integrated circuit device
US5089881A (en) * 1988-11-03 1992-02-18 Micro Substrates, Inc. Fine-pitch chip carrier
SG49842A1 (en) * 1988-11-09 1998-06-15 Nitto Denko Corp Wiring substrate film carrier semiconductor device made by using the film carrier and mounting structure comprising the semiconductor
JPH02215145A (ja) * 1989-02-16 1990-08-28 Furukawa Electric Co Ltd:The テープキャリアの製造方法
US5065228A (en) * 1989-04-04 1991-11-12 Olin Corporation G-TAB having particular through hole
US4976808A (en) * 1989-04-22 1990-12-11 Sumitomo Metal Mining Company Limited Process for removing a polyimide resin by dissolution
JPH03120735A (ja) * 1989-10-04 1991-05-22 Sumitomo Metal Mining Co Ltd 二層フィルムキャリアの製造方法
US5065227A (en) * 1990-06-04 1991-11-12 International Business Machines Corporation Integrated circuit packaging using flexible substrate
KR920702545A (ko) * 1990-06-26 1992-09-04 아이자와 스스무 반도체 장치 및 그 제조 방법
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Publication number Priority date Publication date Assignee Title
US2318592A (en) * 1940-02-24 1943-05-11 Du Pont Electrodeposition
US3868724A (en) * 1973-11-21 1975-02-25 Fairchild Camera Instr Co Multi-layer connecting structures for packaging semiconductor devices mounted on a flexible carrier
EP0452506A1 (en) * 1989-11-06 1991-10-23 Nippon Mektron, Ltd. METHOD OF PRODUCING A FLEXIBLE CIRCUIT BOARD FOR MOUNTING IC's

Also Published As

Publication number Publication date
KR930020618A (ko) 1993-10-20
US5355019A (en) 1994-10-11
EP0559384A2 (en) 1993-09-08
TW223182B (enExample) 1994-05-01
EP0559384A3 (en) 1993-10-20
JP2823771B2 (ja) 1998-11-11
JPH0621142A (ja) 1994-01-28

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