KR20020005684A - 반도체 장치의 전기 전도체 시스템 및 그 제조 방법 - Google Patents
반도체 장치의 전기 전도체 시스템 및 그 제조 방법 Download PDFInfo
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- KR20020005684A KR20020005684A KR1020017013186A KR20017013186A KR20020005684A KR 20020005684 A KR20020005684 A KR 20020005684A KR 1020017013186 A KR1020017013186 A KR 1020017013186A KR 20017013186 A KR20017013186 A KR 20017013186A KR 20020005684 A KR20020005684 A KR 20020005684A
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Abstract
Description
Claims (33)
- 반도체 액티브 소자;외부 장치에 상기 엑티브 소자를 연결하기 위한 금속 트레이스; 및상기 금속 트레이스상에 금속 산화물을 포함하는 절연층을 포함하는 것을 특징으로 하는 반도체 장치.
- 제 1 항에 있어서,반도체 다이 (die) 를 더 포함하고, 상기 엑티브 소자는 상기 다이 (die) 상에 위치되는 것을 특징으로 하는 반도체 장치.
- 제 2 항에 있어서,상기 반도체 엑티브 소자와 상기 금속 트레이스를 연결시키기 위한 수단을 포함하는 것을 특징으로 하는 반도체 장치.
- 제 1 항에 있어서,상기 금속 트레이스는 구리를 포함하는 것을 특징으로 하는 반도체 장치.
- 제 4 항에 있어서,상기 금속 산화물은 블랙 산화물을 포함하는 것을 특징으로 하는 반도체 장치.
- 제 1 항에 있어서,상기 외부 장치에 상기 금속 트레이스를 연결시키기 위한 볼 그리드 어레이를 더 포함하는 것을 특징으로 하는 반도체 장치.
- 제 6 항에 있어서,상기 볼 그리드 어레이에 상기 금속 트레이스를 연결시키기 위한 금도금판을 더 포함하는 것을 특징으로 하는 반도체 장치.
- 반도체 다이 (die) ;외부 장치에 상기 반도체 다이 (die) 를 연결시키기 위한 구리 트레이스; 및상기 구리 트레이스를 마스크하기 위한 구리 산화물을 포함하는 것을 특징으로 하는 패키지형 반도체 장치.
- 제 8 항에 있어서,상기 다이 (die) 를 지지하기 위하여 제 1 및 제 2 표면을 가지는 기판을 더 포함하고, 상기 구리 트레이스는 상기 기판의 제 1 표면에 위치하는 것을 특징으로 하는 패키지형 반도체 장치.
- 제 9 항에 있어서,상기 외부 장치에 상기 구리 트레이스를 연결하기 위한 볼 그리드 어레이를 더 포함하고, 상기 볼 그리드 어레이는 상기 기판의 제 2 표면에 위치하는 것을 특징으로 하는 패키지형 반도체 장치.
- 제 10 항에 있어서,상기 구리 트레이스 및 상기 볼 그리드 어레이 사이에 금을 더 포함하는 것을 특징으로 하는 패키지형 반도체 장치.
- 제 11 항에 있어서,상기 외부 장치에 상기 반도체 다이 (die) 를 연결시키기 위해 상기 기판에 비아홀을 더 포함하고, 상기 비아홀은 상기 구리 트레이스에 전기적으로 연결되는 것을 특징으로 하는 패키지형 반도체 장치.
- 외부 장치에 반도체 장치를 연결하기 위한 금속 트레이스;상기 금속 트레이스의 영역을 마스크하기 위한 금속 산화물을 포함하고, 상기 금속 산화물은 상기 금속 트레이스의 상기 영역에 위치하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템.
- 제 13 항에 있어서,상기 금속 트레이스는 구리를 포함하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템.
- 제 14 항에 있어서,상기 금속 산화물은 블랙 산화물을 포함하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템.
- 제 15 항에 있어서,상기 외부 장치에 상기 금속 트레이스를 연결하기 위한 볼 그리드 어레이를 더 포함하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템.
- 제 16 항에 있어서,상기 금속 트레이스를 상기 볼 그리드 어레이에 연결하기 위한 금을 더 포함하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템.
- 제 17 항에 있어서,상기 금속 산화물은 상기 볼 그리드 어레이가 상기 금속 트레이스에 접촉하는 것을 방지하기 위해 상기 금에 인접하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템.
- 기판에 구리 전도체를 형성하는 단계;상기 구리 전도체에 구리 산화물을 형성하는 단계;상기 구리 전도체의 영역으로부터 상기 구리 산화물을 제거하는 단계; 및상기 구리 전도체의 상기 영역에 도전성 금속을 부착하는 단계를 포함하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 19 항에 있어서,반도체 다이 (die) 에 상기 구리 전도체를 연결하는 단계를 더 포함하고, 상기 다이 (die) 는 상기 기판상에 위치하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 19 항에 있어서,상기 구리 전도체상에 블랙 산화물을 성장시키는 단계를 더 포함하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 19 항에 있어서,상기 도전성 금속을 부착하는 상기 단계는 상기 전도체에 금속을 전자 증착하는 (electro-depositing) 단계를 포함하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제 19 항에 있어서,솔더 볼을 상기 전자 증착된 금속에 부착하는 단계를 더 포함하는 것을 특징으로 하는 반도체 장치 제조 방법,
- 제 20 항에 있어서,수지로 상기 반도체 다이를 밀봉하는 단계를 더 포함하는 것을 특징으로 하는 반도체 장치 제조 방법.
- 기판에 금속 트레이스를 형성하는 단계;상기 금속 트레이스에 블랙 산화물 마스크를 형성하는 단계; 및외부 장치에 상기 금속 트레이스를 연결하기 위해 상기 금속 트레이스에 도전성 금속을 부착하는 단계를 포함하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템 제조 방법.
- 제 25 항에 있어서,상기 금속 트레이스를 형성하는 단계는 상기 기판에 구리를 증착하는 단계를 포함하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템 제조 방법.
- 제 26 항에 있어서,상기 블랙 산화물 마스크를 형성하는 단계는 상기 구리에 산화물을 성장시키는 단계를 포함하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템 제조 방법.
- 제 27 항에 있어서,상기 트레이스로부터 블랙 산화물을 제거하는 단계를 더 포함하고, 산화물을 제거하는 상기 단계는 상기 금속 트레이스에 상기 도전성 금속을 부착하는 상기 단계 이전에 일어나는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템 제조 방법.
- 제 28 항에 있어서,상기 금속 트레이스에 상기 도전성 금속을 부착하는 상기 단계는 상기 기판에 볼 그리드 어레이를 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 장치용 전기 전도체 시스템 제조 방법.
- 상부 및 하부 표면을 가지는 기판;상기 기판에 증착된 반도체 다이 (die) ;상기 기판에 형성된 제 1, 제 2 및 제 3 구리 트레이스로서, 상기 제1 및 제 2 트레이스는 상기 기판의 상기 상부 표면에 위치하고, 상기 제 3 트레이스는 상기 기판의 상기 하부 표면에 위치하는 구리 트레이스;상기 제 1, 제 2 및 제 3 구리 트레이스상에 각각 형성된 제 1, 제 2 및 제3블랙 산화물층;상기 반도체 칩과 상기 제 1 블랙 산화물층에 접착된 다이 (die) 부착 물질;상기 제 3 트레이스상에 전자 증착된 산화 방지 금속; 및상기 산화 방지 금속에 부착된 솔더 볼을 포함하는 것을 특징으로 하는 패키지형 반도체 장치.
- 제 30 항에 있어서,상기 제 3 트레이스에 상기 제 2 트레이스를 연결하는 비아홀을 더 포함하는 것을 특징으로 하는 패키지형 반도체 장치.
- 제 31 항에 있어서,상기 반도체 다이 (die) 는 수지로 밀봉되는 것을 특징으로 하는 패키지형 반도체 장치.
- 제 32 항에 있어서,상기 반도체 다이 (die) 와의 전기적 통신을 위해 상기 제 3 트레이스에 부착된 볼 그리드 어레이를 더 포함하는 것을 특징으로 하는 패키지형 반도체 장치.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/292,745 US6707152B1 (en) | 1999-04-16 | 1999-04-16 | Semiconductor device, electrical conductor system, and method of making |
US09/292,745 | 1999-04-16 |
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KR20020005684A true KR20020005684A (ko) | 2002-01-17 |
KR100620212B1 KR100620212B1 (ko) | 2006-09-05 |
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KR1020017013186A KR100620212B1 (ko) | 1999-04-16 | 2000-04-17 | 반도체 장치의 전기 전도체 시스템 및 그 제조 방법 |
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US (2) | US6707152B1 (ko) |
EP (2) | EP1171915B1 (ko) |
JP (1) | JP2002542627A (ko) |
KR (1) | KR100620212B1 (ko) |
AU (1) | AU4352900A (ko) |
WO (1) | WO2000063969A1 (ko) |
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KR20230069904A (ko) * | 2020-12-18 | 2023-05-19 | 스태츠 칩팩 피티이. 엘티디. | 부착 위치가 개선되는 마스크 설계 |
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TWI253161B (en) * | 2004-09-10 | 2006-04-11 | Via Tech Inc | Chip carrier and chip package structure thereof |
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JP2007103816A (ja) * | 2005-10-07 | 2007-04-19 | Nec Electronics Corp | 配線基板および電子回路装置 |
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1999
- 1999-04-16 US US09/292,745 patent/US6707152B1/en not_active Expired - Lifetime
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2000
- 2000-04-10 US US09/546,426 patent/US6352925B1/en not_active Expired - Fee Related
- 2000-04-17 JP JP2000613002A patent/JP2002542627A/ja active Pending
- 2000-04-17 EP EP00923402A patent/EP1171915B1/en not_active Expired - Lifetime
- 2000-04-17 AU AU43529/00A patent/AU4352900A/en not_active Abandoned
- 2000-04-17 EP EP07017387A patent/EP1918992A1/en not_active Withdrawn
- 2000-04-17 WO PCT/US2000/010203 patent/WO2000063969A1/en active Application Filing
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KR20230069904A (ko) * | 2020-12-18 | 2023-05-19 | 스태츠 칩팩 피티이. 엘티디. | 부착 위치가 개선되는 마스크 설계 |
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WO2000063969A1 (en) | 2000-10-26 |
JP2002542627A (ja) | 2002-12-10 |
EP1171915A1 (en) | 2002-01-16 |
KR100620212B1 (ko) | 2006-09-05 |
EP1171915B1 (en) | 2008-12-31 |
US6707152B1 (en) | 2004-03-16 |
US6352925B1 (en) | 2002-03-05 |
AU4352900A (en) | 2000-11-02 |
EP1918992A1 (en) | 2008-05-07 |
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