GB2312988A - Connecting a semiconductor die to a carrier - Google Patents

Connecting a semiconductor die to a carrier Download PDF

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Publication number
GB2312988A
GB2312988A GB9708705A GB9708705A GB2312988A GB 2312988 A GB2312988 A GB 2312988A GB 9708705 A GB9708705 A GB 9708705A GB 9708705 A GB9708705 A GB 9708705A GB 2312988 A GB2312988 A GB 2312988A
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United Kingdom
Prior art keywords
carrier
die
aperture
semiconductor die
bond pads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB9708705A
Other versions
GB9708705D0 (en
Inventor
Alexander Roger Deas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Memory Corp PLC
Original Assignee
Memory Corp PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB9609807.4A external-priority patent/GB9609807D0/en
Application filed by Memory Corp PLC filed Critical Memory Corp PLC
Priority to GB9708705A priority Critical patent/GB2312988A/en
Publication of GB9708705D0 publication Critical patent/GB9708705D0/en
Publication of GB2312988A publication Critical patent/GB2312988A/en
Withdrawn legal-status Critical Current

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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
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  • Power Engineering (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

A connection method for connecting a semiconductor die to a carrier in such a way as to reduce the physical area occupied by the semiconductor die, comprises the steps of: creating a hole 7 in the carrier 5 to expose the bond pads 4 in the centre of the die 3, affixing the die to the carrier e.g. by adhesive 8 such that the bond pads are exposed by the hole in the carrier, and connecting the bond pads on the die to bonding lands 10 on the carrier by means of leads 9 passing through the hole.

Description

Manufacturing Method The present invention relates to the field of manufacturing. In particular, it relates to the field of bonding semiconductor die to a carrier.
Semiconductor designers are continually striving to reduce the feature sizes of integrated circuits. This is partly to increase the amount of logic that each circuit can contain and partly to reduce the time delays introduced by the circuit.
Numerous novel methods of affixing die to rigid, flexible or semi-flexible carriers have been proposed in recent years. Some of these methods relate to bonding the die, others relate to the interconnection structure between the die and the carrier. For example, EP 0 482 940 relates to a method of bonding semiconductor chips without using thermal stress and pressure. EP 0 527 044 relates to a method of packaging semiconductor chips face-to-face using a thin flexible carrier with through-carrier-connection vias.
EP 0 343 400 describes a flexible carrier for overcoming problems associated with damage due to environmental temperature.
One major barrier to reducing the size of an integrated circuit is the fact that a circuit must interface to a carrier via bond pads, and these bond pads are large compared with the feature size on the integrated circuit. These bond pads are usually situated at the edge of the circuit and are bonded to some chip carrier such as a plastic leadless chip carrier (PLCC) or are bonded directly to a carrier using a form of chip-on-board process.
In some circuits, however, the bond pads are located in the centre of the integrated circuit. The present invention relates to a method of using these integrated circuits with bond pads in the centre of the circuit to fix to a carrier in a novel way, thus improving the density of integrated circuits on a carrier.
According to one aspect of the present invention there is provided a method of mounting a semiconductor die having, on one surface, bonding regions remote from the edges of said die, on to a carrier comprising the steps of forming in said carrier an aperture having at least one dimension smaller than the corresponding dimension of said semiconductor die, affixing said one surface of said die to said carrier in such a manner as to render said bonding pads accessible by way of said aperture and connecting by way of said aperture bonding leads between said bonding pads and corresponding lands on a surface of said carrier.
According to a second aspect of the present invention there is provided a combination of a semiconductor die and a carrier having an aperture therethrough, said die being affixed at its periphery to said carrier and banding leads interconnecting said die and said carrier, said leads passing through said aperture.
The invention will now be particularly described, by way of example, with to the accompanying drawings in which: Figure la shows an integrated circuit die which has bond pads around the perimeter of the die; Figure 1 a shows an integrated circuit die which has bond pads in the centre of the die; and Figure 2 shows the integrated circuit die of Figure ib bonded to a printed circuit board (PCB).
Referring now to the drawing, the die 1 shown in Figure la is a standard semiconductor die that would normally be packaged in a standard package or bonded directly to a carrier. It has a number of bonding pads 2 arranged around its periphery. The die 3 shown in Figure ib shows an arrangement of bond pads 4 on an integrated circuit die positioned remotely from the periphery of the die.
The type of carrier on to which the semiconductor die is attached is not critical. For example, standard printed circuit board (such as FR-4) may be used or a flexible carrier such as a polymer-based material coated with an electrical conductor may be used.
Figure 2 shows how the bond pads are connected to a carrier 5. The carrier is used to route the electrical signals between the integrated circuit and any other device connected to the carrier, and it also serves as plinth to which the devices are connected.
An aperture 7 is created in the carrier to expose the bond pads 4 in the centre of the die. The die is aligned with the hole in the carrier and connected to the carrier by a suitable adhesive 8. The adhesive used should be capable of withstanding the thermal stress caused by thermal cycling of the die.
Bonding leads 9 are then used to connect the bond pads on the die to lands 10 on the carrier by standard bonding techniques. The bond pads are connected to the opposite side of the carrier that to which the integrated circuit is affixed by passing the bonding leads through the aperture in the carrier.
Thus a higher density of integrated circuits can be connected to one side of the carrier than was previously possible using standard integrated circuit connection techniques.
If additional protection for the bond wires is required then a glob-top 11 may be applied to the bond wires or even the die.

Claims (2)

Claims
1. A method of mounting a semiconductor die having, on one surface, bonding regions remote from the edges of said die, on to a carrier comprising the steps of forming in said carrier an aperture having at least one dimension smaller than the corresponding dimension of said semiconductor die, affixing said one surface of said die to said carrier in such a manner as to render said bonding pads accessible by way of said aperture and connecting by way of said aperture bonding leads between said bonding pads and corresponding lands on a surface of said carrier.
2. A combination of a semiconductor die and a carrier having an aperture therethrough, said die being affixed at its periphery to said carrier and banding leads interconnecting said die and said carrier, said leads passing through said aperture.
GB9708705A 1996-05-10 1997-04-29 Connecting a semiconductor die to a carrier Withdrawn GB2312988A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9708705A GB2312988A (en) 1996-05-10 1997-04-29 Connecting a semiconductor die to a carrier

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB9609807.4A GB9609807D0 (en) 1996-05-10 1996-05-10 Manufacturing method
GB9708705A GB2312988A (en) 1996-05-10 1997-04-29 Connecting a semiconductor die to a carrier

Publications (2)

Publication Number Publication Date
GB9708705D0 GB9708705D0 (en) 1997-06-18
GB2312988A true GB2312988A (en) 1997-11-12

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GB9708705A Withdrawn GB2312988A (en) 1996-05-10 1997-04-29 Connecting a semiconductor die to a carrier

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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