KR100208408B1 - 2중 루프 pll회로 - Google Patents
2중 루프 pll회로 Download PDFInfo
- Publication number
- KR100208408B1 KR100208408B1 KR1019930002558A KR930002558A KR100208408B1 KR 100208408 B1 KR100208408 B1 KR 100208408B1 KR 1019930002558 A KR1019930002558 A KR 1019930002558A KR 930002558 A KR930002558 A KR 930002558A KR 100208408 B1 KR100208408 B1 KR 100208408B1
- Authority
- KR
- South Korea
- Prior art keywords
- vco
- signal
- circuit
- phase
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
- H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
- H03L7/235—Nested phase locked loops
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D1/00—Demodulation of amplitude-modulated oscillations
- H03D1/22—Homodyne or synchrodyne circuits
- H03D1/2281—Homodyne or synchrodyne circuits using a phase locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D1/00—Demodulation of amplitude-modulated oscillations
- H03D1/22—Homodyne or synchrodyne circuits
- H03D1/2245—Homodyne or synchrodyne circuits using two quadrature channels
- H03D1/2254—Homodyne or synchrodyne circuits using two quadrature channels and a phase locked loop
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP92-37759 | 1992-02-25 | ||
| JP4037759A JP2810580B2 (ja) | 1992-02-25 | 1992-02-25 | Pll検波回路 |
| JP4169184A JP2859037B2 (ja) | 1992-06-26 | 1992-06-26 | 2重pll回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR930018947A KR930018947A (ko) | 1993-09-22 |
| KR100208408B1 true KR100208408B1 (ko) | 1999-07-15 |
Family
ID=26376903
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019930002558A Expired - Fee Related KR100208408B1 (ko) | 1992-02-25 | 1993-02-24 | 2중 루프 pll회로 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5329250A (enExample) |
| EP (1) | EP0557867B1 (enExample) |
| KR (1) | KR100208408B1 (enExample) |
| DE (1) | DE69300782T2 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5475378A (en) * | 1993-06-22 | 1995-12-12 | Canada Post Corporation | Electronic access control mail box system |
| JPH07235874A (ja) * | 1994-02-24 | 1995-09-05 | Sony Corp | 発振器、それを用いたシンセサイザチューナ回路及びam同期検波回路 |
| DE4423215C1 (de) * | 1994-07-01 | 1995-12-21 | Siemens Ag | Frequenzüberwachungsschaltung eines Taktgenerators |
| DE19521908B4 (de) * | 1995-06-16 | 2005-11-10 | Atmel Germany Gmbh | Überlagerungsempfänger mit Synchrondemodulation für den Zeitzeichenempfang |
| US5737694A (en) * | 1995-11-30 | 1998-04-07 | Scientific-Atlanta, Inc. | Highly stable frequency synthesizer loop with feedforward |
| US5943382A (en) * | 1996-08-21 | 1999-08-24 | Neomagic Corp. | Dual-loop spread-spectrum clock generator with master PLL and slave voltage-modulation-locked loop |
| US6281727B1 (en) | 2000-10-05 | 2001-08-28 | Pericom Semiconductor Corp. | Fine-tuning phase-locked loop PLL using variable resistor between dual PLL loops |
| US7574185B2 (en) * | 2004-12-17 | 2009-08-11 | Verigy (Singapore) Pte. Ltd. | Method and apparatus for generating a phase-locked output signal |
| JP4365814B2 (ja) | 2005-09-26 | 2009-11-18 | 株式会社東芝 | 受信機および無線通信装置 |
| US9444470B2 (en) * | 2014-01-31 | 2016-09-13 | Microsemi Semiconductor Ulc | Double phase-locked loop with frequency stabilization |
| BR112018075522B1 (pt) | 2016-06-23 | 2022-10-11 | Tetra Laval Holdings & Finance Sa | Material para acondicionamento em folha, e, embalagem vedada |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5945273B2 (ja) * | 1976-09-16 | 1984-11-05 | ソニー株式会社 | テレビジヨン受像機 |
| DE2741351C2 (de) * | 1977-09-14 | 1983-12-08 | Wandel & Goltermann Gmbh & Co, 7412 Eningen | Digital einstellbarer Frequenzerzeuger mit mehreren Oszillatoren |
| IT1123853B (it) * | 1978-10-16 | 1986-04-30 | Licentia Gmbh | Disposizione di comando avente un circuito di regolazione a due fili |
| NL8001903A (nl) * | 1980-04-01 | 1981-11-02 | Philips Nv | Inrichting voor het versterken van een gemoduleerd draaggolfsignaal. |
| FR2565440B1 (fr) * | 1984-06-01 | 1986-09-05 | Adret Electronique | Etage synthetiseur de frequence comportant deux boucles a verrouillage de phase dont la seconde multiplie la frequence de la premiere par un facteur voisin de l'unite. |
| US4839603A (en) * | 1987-09-24 | 1989-06-13 | Unisys Corporation | Multiple-loop microwave frequency synthesizer using two phase lockloops |
| US5157355A (en) * | 1988-09-13 | 1992-10-20 | Canon Kabushiki Kaisha | Phase-locked loop device having stability over wide frequency range |
| JPH0783259B2 (ja) * | 1988-10-19 | 1995-09-06 | ローム株式会社 | Pll基準発振複合装置 |
| JP2881791B2 (ja) * | 1989-01-13 | 1999-04-12 | ソニー株式会社 | 周波数シンセサイザ |
| JPH02244820A (ja) * | 1989-03-16 | 1990-09-28 | Oki Electric Ind Co Ltd | Pll回路 |
| US4912432A (en) * | 1989-04-17 | 1990-03-27 | Raytheon Company | Plural feedback loop digital frequency synthesizer |
| US4943787A (en) * | 1989-09-05 | 1990-07-24 | Motorola, Inc. | Digital time base generator with adjustable delay between two outputs |
| US4987386A (en) * | 1989-10-03 | 1991-01-22 | Communications Satellite Corporation | Coherent phase and frequency recovery method and circuit |
| FI895068A0 (fi) * | 1989-10-25 | 1989-10-25 | Telenokia Oy | Frekvenssyntetisator. |
| US4994762A (en) * | 1989-11-20 | 1991-02-19 | Motorola, Inc. | Multiloop synthesizer with optimal spurious performance |
| JPH04313917A (ja) * | 1991-03-29 | 1992-11-05 | Mitsubishi Electric Corp | ダブルpll装置 |
| JPH0537435A (ja) * | 1991-07-31 | 1993-02-12 | Nec Corp | Tdma方式に用いる局部発振周波数シンセサイザ |
| US5105168A (en) * | 1991-08-28 | 1992-04-14 | Hewlett-Packard Company | Vector locked loop |
| US5208555A (en) * | 1991-09-23 | 1993-05-04 | Triquint Semiconductor, Inc. | Circuit for limiting maximum frequency output of a voltage controlled oscillator |
| US5235290A (en) * | 1992-05-14 | 1993-08-10 | Bar David Israel | Method and apparatus for smoothing out phase fluctuations in a monitored signal |
-
1993
- 1993-02-11 US US08/016,247 patent/US5329250A/en not_active Expired - Lifetime
- 1993-02-16 DE DE69300782T patent/DE69300782T2/de not_active Expired - Fee Related
- 1993-02-16 EP EP93102420A patent/EP0557867B1/en not_active Expired - Lifetime
- 1993-02-24 KR KR1019930002558A patent/KR100208408B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE69300782T2 (de) | 1996-05-30 |
| KR930018947A (ko) | 1993-09-22 |
| US5329250A (en) | 1994-07-12 |
| EP0557867A2 (en) | 1993-09-01 |
| EP0557867B1 (en) | 1995-11-15 |
| EP0557867A3 (enExample) | 1994-04-06 |
| DE69300782D1 (de) | 1995-12-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH06343166A (ja) | 高周波受信装置 | |
| KR100208408B1 (ko) | 2중 루프 pll회로 | |
| EP0497801B1 (en) | A phase locked loop for producing a reference carrier for a coherent detector | |
| EP1107458B1 (en) | System for limiting IF variation in phase locked loops | |
| JP2005539449A (ja) | 電圧制御lcタンク発振器 | |
| JP4610698B2 (ja) | Aft回路 | |
| JP2859037B2 (ja) | 2重pll回路 | |
| KR0141908B1 (ko) | 영상 검파 회로 | |
| JP2810580B2 (ja) | Pll検波回路 | |
| JP2001230670A (ja) | Pll発振回路 | |
| JP2944019B2 (ja) | Aft回路およびこれを用いた電子同調チューナ | |
| JPH0787368B2 (ja) | 外部制御型原子発振器 | |
| JPH0846433A (ja) | ビデオ信号復調回路 | |
| KR0138363B1 (ko) | 전압제어발진기 | |
| JPH1013228A (ja) | 位相同期発振回路 | |
| Takahashi et al. | A video and sound IF processing IC with automatic tuning loops | |
| JPH05328250A (ja) | 同期検波回路 | |
| JP2881715B2 (ja) | Pll回路およびこれを用いるtv信号処理装置 | |
| JPH04357780A (ja) | 映像中間周波信号処理装置 | |
| JP2725839B2 (ja) | 映像中間周波信号処理回路 | |
| JPH0342008B2 (enExample) | ||
| JPH0951488A (ja) | 映像中間周波信号処理装置 | |
| JPH09321619A (ja) | 周波数シンセサイザ | |
| JPS61167223A (ja) | 位相同期回路 | |
| Maddy et al. | The Electrical Engineering Handbook Ed. Richard C. Dorf Boca Raton: CRC Press LLC, 2000 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| A201 | Request for examination | ||
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-3-3-R10-R18-oth-X000 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
|
| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U11-oth-PR1002 Fee payment year number: 1 |
|
| PG1601 | Publication of registration |
St.27 status event code: A-4-4-Q10-Q13-nap-PG1601 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 4 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 5 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 6 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 7 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 8 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 9 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-5-5-R10-R17-oth-X000 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 10 |
|
| FPAY | Annual fee payment |
Payment date: 20090410 Year of fee payment: 11 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 11 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-5-5-R10-R17-oth-X000 |
|
| LAPS | Lapse due to unpaid annual fee | ||
| PC1903 | Unpaid annual fee |
St.27 status event code: A-4-4-U10-U13-oth-PC1903 Not in force date: 20100416 Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE |
|
| PC1903 | Unpaid annual fee |
St.27 status event code: N-4-6-H10-H13-oth-PC1903 Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE Not in force date: 20100416 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |