JPWO2020050325A1 - パワー半導体装置およびその製造方法、ならびに電力変換装置 - Google Patents
パワー半導体装置およびその製造方法、ならびに電力変換装置 Download PDFInfo
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- JPWO2020050325A1 JPWO2020050325A1 JP2020541274A JP2020541274A JPWO2020050325A1 JP WO2020050325 A1 JPWO2020050325 A1 JP WO2020050325A1 JP 2020541274 A JP2020541274 A JP 2020541274A JP 2020541274 A JP2020541274 A JP 2020541274A JP WO2020050325 A1 JPWO2020050325 A1 JP WO2020050325A1
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- power semiconductor
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Abstract
Description
まず本実施の形態のパワー半導体装置の構成について図1〜図7を用いて説明する。なお、説明の便宜のため、X方向、Y方向、Z方向が導入されている。図1〜図7の各図のZ軸が示す通り、図1においては下側がZ方向正側であるのに対し、図2および図7においては上側がZ方向正側である。また図5および図6においては紙面手前側すなわち平面視における上側がZ方向正側である。
図16は、実施の形態2に係るパワー半導体装置に冷却部材が設置された態様を示す概略断面図である。図17は、実施の形態2に係るパワー半導体装置のリード部材の部分を抜粋した概略拡大斜視図である。図18は、図16のパワー半導体装置を上下反転させ回路基板に実装された態様を示す概略平面図である。図19は、図16のパワー半導体装置が回路基板に実装された全体の態様を示す概略断面図である。すなわち図16、図17、図18、図19はそれぞれ実施の形態1の図1、図2、図5、図7に対応する。以下図16〜図19を用いて、本実施の形態のパワー半導体装置の構成について概略的に説明する。
図20は、実施の形態3に係るパワー半導体装置の製造方法の一工程を示す概略断面図である。図21は、図20のパワー半導体装置が回路基板に実装された態様を示す概略平面図である。図22は、図20のパワー半導体装置が回路基板に実装された全体の態様を示す概略断面図である。すなわち図20、図21、図22はそれぞれ実施の形態1の図9、図5、図7に対応する。なお以下の説明においても、実施の形態1,2と同一の構成要素には同一の符号を付し、内容が重複する場合はその説明を繰り返さない場合がある。
図23は、実施の形態4に係るパワー半導体装置の態様を示す概略断面図である。以降の各例においても、既述の各例と同一の構成要素には同一の符号を付し、内容が重複する場合にはその説明を繰り返さない場合がある。図23を参照して、本実施の形態のパワー半導体装置4は、他の各例と同様に、複数のリード端子11のそれぞれは、パワー半導体素子21が載置されるダイパッド部11DPを有している。複数のリード端子11のそれぞれにおけるコーティング樹脂40は、根元部11Aの表面から、ダイパッド部11DPよりも根元部11A側の領域までの範囲内の少なくとも一部の領域のみに形成される。つまりコーティング樹脂40は、ダイパッド部11DPの表面上には形成されていない。ここでも上記各他の例と同様に、根元部11Aの下側の表面とダイパッド部11DPの下側の表面との間の部分においては、モールド樹脂30の表面上を覆うように、コーティング樹脂40が配置されてもよい。
図27は、実施の形態5に係るパワー半導体装置の態様を示す概略断面図である。図27を参照して、本実施の形態のパワー半導体装置5は、ダイパッド部11DPの図27の下側の表面が、モールド樹脂30の内側に埋まっており、モールド樹脂30から露出していない。この点においては図23の実施の形態4と同様である。図27においてはモールド樹脂30の下側の表面と、モールド樹脂30の最下面との間隔GPが350μm以上であることが好ましい。また図27のダイパッド部11DPの下側の表面と、モールド樹脂30の最下面とがほぼ平行となるように配置されることが好ましい。このようにすれば図13の比較例に示すようなダイパッド部11DPの傾斜などによるパワー半導体装置の信頼性の低下を抑制できる。
本実施の形態は、上述した実施の形態1〜5にかかるパワー半導体装置を電力変換装置に適用したものである。本発明はある種の電力変換装置に限定されるものではないが、以下、実施の形態6として、三相のインバータに本発明を適用した場合について説明する。
Claims (16)
- リード部材と、
前記リード部材上に載置される半導体素子と、
前記半導体素子を封止するモールド樹脂とを備え、
前記リード部材は複数のリード端子を含み、前記複数のリード端子は前記モールド樹脂の内側から外側まで延び、
前記複数のリード端子のそれぞれは、前記モールド樹脂の外側において、前記半導体素子が載置される領域側に配置され前記モールド樹脂から突出する方向に延びる根元部と、前記根元部と異なる方向に延び前記根元部から見て前記半導体素子が載置される領域の反対側に配置される先端部とを含み、
前記根元部の延びる長さは、前記複数のリード端子のうち互いに隣り合う1対のリード端子の間で互いに異なっており、
前記複数のリード端子のそれぞれのうち少なくとも前記根元部の表面は、コーティング樹脂に覆われる、パワー半導体装置。 - 前記複数のリード端子のそれぞれは、前記半導体素子が載置されるダイパッド部を有し、
前記コーティング樹脂は、前記根元部の表面から、前記ダイパッド部の、前記半導体素子が載置される表面と反対側の表面までの少なくとも一部に形成される、請求項1に記載のパワー半導体装置。 - 前記コーティング樹脂は前記ダイパッド部に形成され、
前記ダイパッド部における前記コーティング樹脂は、前記半導体素子が載置される表面と反対側の表面に形成される、請求項2に記載のパワー半導体装置。 - 前記ダイパッド部における前記コーティング樹脂は、前記反対側の表面のみに形成される、請求項3に記載のパワー半導体装置。
- 前記複数のリード端子のそれぞれは、前記半導体素子が載置されるダイパッド部を有し、
前記複数のリード端子のそれぞれにおける前記コーティング樹脂は、前記根元部の表面から、前記ダイパッド部よりも前記根元部側の領域までの範囲内のみに形成される、請求項1に記載のパワー半導体装置。 - 前記ダイパッド部の、前記半導体素子が載置される表面と反対側の表面上には、絶縁層を挟んで金属箔が形成される、請求項5に記載のパワー半導体装置。
- 前記複数のリード端子は、前記モールド樹脂の内側において、前記ダイパッド部と前記根元部との間の段差部にて屈曲しており、
前記ダイパッド部は、前記根元部から見て前記先端部と反対側に配置される、請求項2〜6のいずれか1項に記載のパワー半導体装置。 - 前記モールド樹脂の外表面には、前記外表面が部分的に屈曲したモールド樹脂段差部が形成され、
前記モールド樹脂段差部は、前記外表面の延び拡がる方向が前記モールド樹脂段差部の周囲の領域と異なる方向とされた領域である、請求項7に記載のパワー半導体装置。 - 前記コーティング樹脂は、前記モールド樹脂の表面の一部を覆うように形成される、請求項1〜8のいずれか1項に記載のパワー半導体装置。
- 前記複数のリード端子のそれぞれは、前記先端部に屈曲部を有する、請求項1〜9のいずれか1項に記載のパワー半導体装置。
- 回路基板を備え、
前記回路基板上には前記複数のリード端子のそれぞれと導通する配線部が形成され、
前記配線部の少なくとも一部は前記コーティング樹脂に覆われる、請求項1〜10のいずれか1項に記載のパワー半導体装置。 - 請求項1〜11のいずれか1項に記載のパワー半導体装置を有し、入力される電力を変換して出力する主変換回路と、
前記主変換回路を制御する制御信号を前記主変換回路に出力する制御回路と備えた電力変換装置。 - リード部材上に半導体素子が載置された状態で、樹脂で封止された前記半導体素子を含む部材にコーティング樹脂を形成する工程を備え、
前記リード部材は複数のリード端子に切り分けられ、前記複数のリード端子は前記樹脂によるモールド樹脂の内側から外側まで延び、
前記複数に切り分けられたリード端子のそれぞれは、前記モールド樹脂の外側において、前記半導体素子が載置される領域側に配置され前記モールド樹脂から突出する方向に延びる根元部と、前記根元部と異なる方向に延び前記根元部から見て前記半導体素子が載置される領域の反対側に配置される先端部とを含み、
前記根元部の延びる長さは、前記複数のリード端子のうち互いに隣り合う1対のリード端子の間で互いに異なっており、
前記複数のリード端子のそれぞれのうち少なくとも前記根元部の表面は、前記コーティング樹脂を形成する工程において前記コーティング樹脂に覆われ、
前記コーティング樹脂を形成する工程においては、帯電された樹脂材料が霧状に放散されたものが前記根元部の表面に形成される、パワー半導体装置の製造方法。 - 前記複数のリード端子のそれぞれは、前記半導体素子が載置されるダイパッド部を有し、
前記コーティング樹脂を形成する工程においては、前記ダイパッド部が接地された状態とされる、請求項13に記載のパワー半導体装置の製造方法。 - 前記複数のリード端子のそれぞれは、前記半導体素子が載置されるダイパッド部を有し、
前記ダイパッド部の、前記半導体素子が載置される表面と反対側の表面上には、絶縁層を挟んで金属箔が形成され、
前記コーティング樹脂を形成する工程においては、前記金属箔と前記樹脂材料とが同極に帯電された状態とされる、請求項13に記載のパワー半導体装置の製造方法。 - 前記コーティング樹脂を形成する工程は、前記部材の少なくとも一部が回路基板に実装された状態でなされ、
前記コーティング樹脂を形成する工程において、前記コーティング樹脂は、前記回路基板上に形成され前記複数のリード端子のそれぞれと導通する配線部の少なくとも一部の上を覆うように形成される、請求項13〜15のいずれか1項に記載のパワー半導体装置の製造方法。
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- 2019-09-04 US US17/267,987 patent/US11631623B2/en active Active
- 2019-09-04 CN CN201980056495.0A patent/CN112655087A/zh active Pending
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US11631623B2 (en) | 2023-04-18 |
US20210327777A1 (en) | 2021-10-21 |
JP7241763B2 (ja) | 2023-03-17 |
CN112655087A (zh) | 2021-04-13 |
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