JPWO2016166835A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JPWO2016166835A1 JPWO2016166835A1 JP2017512119A JP2017512119A JPWO2016166835A1 JP WO2016166835 A1 JPWO2016166835 A1 JP WO2016166835A1 JP 2017512119 A JP2017512119 A JP 2017512119A JP 2017512119 A JP2017512119 A JP 2017512119A JP WO2016166835 A1 JPWO2016166835 A1 JP WO2016166835A1
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- semiconductor device
- lead frame
- mold resin
- resin
- heat dissipation
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Abstract
Description
この発明の上記以外の目的、特徴、観点及び効果は、図面を参照する以下のこの発明の詳細な説明から、さらに明らかになるであろう。
以下に、本発明の実施の形態1に係る半導体装置について、図面に基づいて説明する。図1は、本実施の形態1に係る樹脂モールド型の半導体装置の構成を示す断面図、図2は、一回目のトランスファー成形工程後の半導体装置を放熱面側から見た平面図、図3は、二回目のトランスファー成形工程後の半導体装置を放熱面側から見た平面図である。なお、各図において、図中、同一または相当部分には同一符号を付している。
図8は、本発明の実施の形態2に係る半導体装置の構成を示す断面図である。本実施の形態2に係る半導体装置101は、上記実施の形態1に係る半導体装置100の変形例であり、全体的な構成は同じであるため、相違点のみを説明する。
図11は、本発明の実施の形態3に係る半導体装置のリードフレームの表面状態を示す走査電子顕微鏡写真による図である。なお、本実施の形態3に係る半導体装置の全体構成は、上記実施の形態1と同様であるので、各要素の説明を省略する(図1参照)。また、本実施の形態3に係る半導体装置の製造方法は、上記実施の形態1と同様であるので説明を省略する。
図12は、本発明の実施の形態4に係る半導体装置の構成を示す断面図である。本実施の形態4に係る半導体装置102は、上記実施の形態1に係る半導体装置100の変形例であり、全体的な構成は同じであるため、相違点のみを説明する。また、本実施の形態4に係る半導体装置102の製造方法は、上記実施の形態1と同様であるので説明を省略する。
図18は、本発明の実施の形態5に係る半導体装置における二回目のトランスファー成形工程後の薄肉成形部を示す拡大断面図である。なお、本実施の形態5に係る半導体装置の全体構成は、上記実施の形態1と同様であるので、各要素の説明を省略する(図1参照)。また、本実施の形態5に係る半導体装置の製造方法は、上記実施の形態1と同様であるので説明を省略する。
図19は、本発明の実施の形態6に係る半導体装置の薄肉成形部を示す拡大断面図である。なお、本実施の形態6に係る半導体装置の全体構成は、上記実施の形態1と同様であるので、各要素の説明を省略する(図1参照)。また、本実施の形態6に係る半導体装置の製造方法は、上記実施の形態1と同様であるので説明を省略する。
図20は、本発明の実施の形態7に係る半導体装置を示す断面図、図21は、本実施の形態7に係る半導体装置の二回目のトランスファー成形工程を示す断面図である。本実施の形態7に係る半導体装置103は、上記実施の形態1に係る半導体装置100の変形例であり、全体的な構成は同じであるため、相違点のみを説明する。
Claims (16)
- リードフレームの実装部に実装された半導体素子、前記実装部を封止する第一のモールド樹脂、前記実装部と対向する前記リードフレームの放熱部を封止する第二のモールド樹脂を備え、
前記リードフレームの前記放熱部を覆う薄肉成形部と、前記リードフレームの離間された二つの領域の間の少なくとも一部に配置されるリードフレーム間充填部が、前記第二のモールド樹脂により一体的に成形されたことを特徴とする半導体装置。 - 前記第二のモールド樹脂は、トランスファー成形工程で用いられた成形金型のゲート内に残った樹脂の痕跡であるゲートブレイク跡を有し、前記リードフレーム間充填部は、前記ゲートブレイク跡に近接して配置されることを特徴とする請求項1記載の半導体装置。
- 前記リードフレーム間充填部が配置された前記リードフレームの側面の一部に、カエリを有することを特徴とする請求項1または請求項2に記載の半導体装置。
- 前記リードフレーム間充填部は、前記第一のモールド樹脂との接合部の一部に凹部を有することを特徴とする請求項1から請求項3のいずれか一項に記載の半導体装置。
- 前記リードフレームの離間された二つの領域の間の少なくとも一部に、前記第一のモールド樹脂が充填され、前記二つの領域の間に充填された前記第一のモールド樹脂は、前記第二のモールド樹脂との接合面の一部に凹部を有することを特徴とする請求項1から請求項4のいずれか一項に記載の半導体装置。
- 前記リードフレームの離間された二つの領域を跨ぐように前記実装部にブリッジ実装された電子部品を備え、前記電子部品の直下に相当する前記第二のモールド樹脂に窪みが設けられ、前記窪みに前記第一のモールド樹脂が充填されたことを特徴とする請求項1から請求項5のいずれか一項に記載の半導体装置。
- 前記リードフレームとして、表面が粗化された金属めっきにより被膜された粗化金属めっきリードフレームを用いたことを特徴とする請求項1から請求項6のいずれか一項に記載の半導体装置。
- 前記リードフレームは、金属めっきにより被膜され、前記金属めっきの表面形状を鱗状に変形させた鱗状部を有することを特徴とする請求項1から請求項7のいずれか一項に記載の半導体装置。
- 前記第一のモールド樹脂は、トランスファー成形工程で用いられた成形金型のゲート内に残った樹脂の痕跡であるゲートブレイク跡を有し、前記鱗状部は、前記リードフレームの前記実装部の前記ゲートブレイク跡に近接する箇所に配置されることを特徴とする請求項8記載の半導体装置。
- 前記第二のモールド樹脂は、トランスファー成形工程で用いられた成形金型のゲート内に残った樹脂の痕跡であるゲートブレイク跡を有し、前記鱗状部は、前記リードフレームの前記放熱部の前記ゲートブレイク跡に近接する箇所に配置されることを特徴とする請求項8または請求項9に記載の半導体装置。
- 前記鱗状部は、前記リードフレームの前記実装部及び前記放熱部のいずれか一方または両方の外周部に配置されることを特徴とする請求項8から請求項10のいずれか一項に記載の半導体装置。
- 前記第二のモールド樹脂には、前記第一のモールド樹脂よりも熱伝導率が高い高放熱樹脂が用いられることを特徴とする請求項1から請求項11のいずれか一項に記載の半導体装置。
- 前記第一のモールド樹脂及び前記第二のモールド樹脂には、熱伝導率が3W/m・K〜12W/m・Kの高放熱樹脂が用いられることを特徴とする請求項1から請求項11のいずれか一項に記載の半導体装置。
- 前記第二のモールド樹脂は、最大径が0.02mm〜0.15mmのフィラーを含有し、前記薄肉成形部の厚さは、0.022mm〜0.3mmであることを特徴とする請求項1から請求項13のいずれか一項に記載の半導体装置。
- 前記薄肉成形部は、表面のスキン層が除去されていることを特徴とする請求項1から請求項14のいずれか一項に記載の半導体装置。
- 前記リードフレームの前記放熱部を覆う前記薄肉成形部に、ヒートシンクが直接接合されたことを特徴とする請求項1から請求項15のいずれか一項に記載の半導体装置。
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