JPWO2013179638A1 - 半導体モジュール及びその製造方法 - Google Patents
半導体モジュール及びその製造方法 Download PDFInfo
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- JPWO2013179638A1 JPWO2013179638A1 JP2014518275A JP2014518275A JPWO2013179638A1 JP WO2013179638 A1 JPWO2013179638 A1 JP WO2013179638A1 JP 2014518275 A JP2014518275 A JP 2014518275A JP 2014518275 A JP2014518275 A JP 2014518275A JP WO2013179638 A1 JPWO2013179638 A1 JP WO2013179638A1
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- Prior art keywords
- source electrode
- bare chip
- copper connector
- semiconductor module
- copper
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 243
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 55
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 404
- 229910052802 copper Inorganic materials 0.000 claims abstract description 382
- 239000010949 copper Substances 0.000 claims abstract description 382
- 229910000679 solder Inorganic materials 0.000 claims abstract description 204
- 239000000758 substrate Substances 0.000 claims abstract description 187
- 238000005304 joining Methods 0.000 claims description 31
- 229910052751 metal Inorganic materials 0.000 claims description 23
- 239000002184 metal Substances 0.000 claims description 23
- 239000007787 solid Substances 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 35
- 230000008569 process Effects 0.000 abstract description 23
- 239000011889 copper foil Substances 0.000 description 22
- 238000010586 diagram Methods 0.000 description 14
- 230000017525 heat dissipation Effects 0.000 description 10
- 238000005452 bending Methods 0.000 description 9
- 238000004080 punching Methods 0.000 description 9
- 238000001514 detection method Methods 0.000 description 8
- WABPQHHGFIMREM-AKLPVKDBSA-N lead-210 Chemical compound [210Pb] WABPQHHGFIMREM-AKLPVKDBSA-N 0.000 description 8
- 238000001179 sorption measurement Methods 0.000 description 8
- 230000020169 heat generation Effects 0.000 description 6
- 230000007246 mechanism Effects 0.000 description 6
- 230000009467 reduction Effects 0.000 description 6
- 239000011347 resin Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 230000008646 thermal stress Effects 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- 241000784732 Lycaena phlaeas Species 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- -1 copper and aluminum Chemical class 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000009736 wetting Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 1
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Abstract
Description
図14に示す半導体モジュール100は、金属製の基板101と、基板101の凹部の底部平坦面上に設けられた樹脂102と、樹脂102上に形成された複数の銅箔(配線パターン)103a,103b,103c,103dとを備えている。銅箔103a及び銅箔103cと銅箔103dとの間には、溝109が形成されている。そして、複数の銅箔103a,103b,103c,103dのうち銅箔103a,103bの上には、熱緩衝板104a,104bがそれぞれ形成され、熱緩衝板104a,104b上には、IGBT105a,105bがそれぞれ形成されている。各IGBT105a,105bは、ベアチップIGBT(ベアチップトランジスタ)である。
また、樹脂102、銅箔103a,103b,103c、熱緩衝板104a,104b、IGBT105a,105b、及び配線106a,106bは、ゲル107によって封入されている。また、基板101の凹部を覆う蓋108が基板101の上部に固定されている。
図15に示す半導体モジュール200において、基板(図示せず)上には複数の導電パッド201,202が形成されている。そして、複数の導電パッド201,202のうちの一つの導電パッド201上にはMOSチップ203が半田接続されている。また、MOSチップ203の上面には、複数のソース電極205及び単一のゲート電極204が形成され、MOSチップ203の下面には図示しないドレイン電極が形成されている。
即ち、図14に示した半導体モジュール100の場合、IGBT105aのエミッタと銅箔103bとの接続及びIGBT105bのエミッタと銅箔103cとの接続につき、ワイヤで構成される配線106a,106bを用いて接続している。このワイヤを用いた接続は、ワイヤボンディング装置(図示せず)を使用して行われるため、配線106a,106bを実装する作業が、IGBT105a,105bやその他の表面実装部品を基板上の配線パターン上に実装する際に行われる半田実装作業と異なり、製造工程が別になってしまうという問題があった。ワイヤボンディングによる実装作業が、半田実装作業と異なり、別の製造工程を要すると、製造タクトが長くなるとともに、ワイヤボンディングの専用設備が必要になり、製造コストが高くなってしまうという問題があった。
また、この半導体モジュールにおいて、前記ベアチップトランジスタが、上面にソース電極及びゲート電極を形成したベアチップFETであり、前記銅コネクタが、ソース電極用銅コネクタと、ゲート電極用銅コネクタとを備え、前記ベアチップFETのソース電極上と前記複数の配線パターンのうち他の配線パターン上とを前記ソース電極用銅コネクタで半田を介して接続し、前記ベアチップFETのゲート電極上と前記複数の配線パターンのうち更に他の配線パターン上とを前記ゲート電極用銅コネクタで半田を介して接続することが好ましい。
更に、この半導体モジュールにおいて、前記第1ソース電極用銅コネクタは、前記長方形状に形成されたソース電極の短辺が延びる方向に沿って引き出されるとともに、当該ソース電極の短辺及び長辺に沿う短辺及び長辺を有する、前記ソース電極に接続する接続面の面積が前記ソース電極とほぼ同一の面積である接続部を備えることが好ましい。
また、この半導体モジュールにおいて、前記第2ソース電極用銅コネクタは、前記長方形状に形成されたソース電極の長辺が延びる方向に沿って引き出されるとともに、当該ソース電極の長辺及び短辺に沿う長辺及び短辺を有する、前記ソース電極に接続する接続面の面積が前記ソース電極とほぼ同一の面積である接続部を備えることが好ましい。
この半導体モジュールによれば、ゲート電極用銅コネクタに対して90°直角配置とする第2ソース電極用銅コネクタとベアチップFETの上面に形成されたソース電極との接続信頼性を確保できる。
また、本発明の更に別の態様に係る半導体モジュールは、基板上に実装されるベアチップトランジスタの配置に自由度が生まれ、基板上の配線の設計の自由度が増大し、基板上における半導体モジュールのレイアウトをコンパクトにすることができるように、1つのベアチップFETにおいて、1種類のゲート電極用銅コネクタと、ゲート電極用銅コネクタに対して180°ストレート配置とする第1ソース電極用銅コネクタと、前記ゲート電極用銅コネクタに対して90°直角配置とする第2ソース電極用銅コネクタとの2種類の第1ソース電極用銅コネクタ及び第2ソース電極用銅コネクタのうちから選択されたいずれか一方のソース電極用銅コネクタとを組み合わせて使用することを特徴とする。
トルクセンサ7で検出された操舵トルクTs及び車速センサ9で検出された車速Vは制御演算部としての制御演算装置11に入力され、制御演算装置11で演算された電流指令値をゲート駆動回路12に入力する。ゲート駆動回路12で、電流指令値等に基づいて形成されたゲート駆動信号はFETのブリッジ構成で成るモータ駆動部13に入力され、モータ駆動部13は非常停止用の遮断装置14を経て3相ブラシレスモータで構成される電動モータ8を駆動する。3相ブラシレスモータの各相電流は電流検出回路15で検出され、検出された3相のモータ電流ia〜icは制御演算装置11にフィードバック電流として入力される。また、3相ブラシレスモータには、ホールセンサ等の回転センサ16が取り付けられており、回転センサ16からの回転信号RTがロータ位置検出回路17に入力され、検出された回転位置θが制御演算装置11に入力される。
また、ソース電極用銅コネクタ36aは、図6(A)に示すように、ゲート電極用銅コネクタ36bに対して180°ストレート配置とする第1ソース電極用銅コネクタ36a1と、図6(B)に示すようにゲート電極用銅コネクタ36bに対して90°直角配置とする第2ソース電極用銅コネクタ36a2との2種類ある。そして、第1ソース電極用銅コネクタ36a1は、図4におけるFETTr2、Tr4、及びTr6において図7に示す矢印A’方向に引き出されて接続される。また、第2ソース電極用銅コネクタ36a2は、図4におけるFETTr1において図7に示す矢印B方向に引き出されて接続され、図4におけるFETTr3及びTr5において図7に示す矢印B’方向に引き出されて接続される。
これにより、基板31上に実装されるベアチップFET35の配置に自由度が生まれ、基板31上の配線の設計の自由度が増大し、基板31上における半導体モジュール30のレイアウトをコンパクトにすることができる。また、基板31上における3相モータの各相の径路の長さ(a相出力ライン91aの長さ、b相出力ライン91bの長さ、及びc相出力ライン91cの長さ)を同一にすることを容易に行うことができる。これにより、3相モータの各相特性、特に、インピーダンス特性を容易に一致させることができ、トルクや速度等のリップル精度を向上することが可能になる。
ゲート電極用銅コネクタ36bは、銅板を打抜き及び曲げ加工することによって形成されるものであり、平板部36baと、平板部36baの一端から延び、半田34fを介してベアチップFET35のゲート電極Gに接続される接続部36bbと、平板部36baの他端から延び、半田34cを介して配線パターン33cに接続される接続部36bcとを備えている。
また、ゲート電極用銅コネクタ36bの接続部36bbは、平板部36baの一端から斜め下方に延びる連結片36bdの下端に外方に延びるように形成されている。この接続部36bbは、ゲート電極Gの短辺及び長辺に沿う短辺及び長辺を有し、ゲート電極Gに接続する接続面の面積がゲート電極Gの面積とほぼ同一の面積を有する。接続部36bbのゲート電極Gに接続する接続面の面積がゲート電極Gとほぼ同じとすることにより、ゲート電極用銅コネクタ36bとゲート電極Gとの接続信頼性を確保することができる。
第1ソース電極用銅コネクタ36a1は、銅板を打抜き及び曲げ加工することによって形成されるものであり、平板部36aaと、平板部36aaの一端から延び、半田34eを介してベアチップFET35のソース電極Sに接続される接続部36abと、平板部36aaの他端から延び、半田34bを介して配線パターン33bに接続される接続部36acとを備えている。
第1ソース電極用銅コネクタ36a1の平板部36aaは、エアーによる吸着装置の吸着面を構成する。このため、平板部aaを利用してエアーによる吸着を行うことができる。この平板部36aaには、第2ソース電極用銅コネクタ36a2との識別のための識別用孔36afが形成されている。
第2ソース電極用銅コネクタ36a2は、銅板を打抜き及び曲げ加工することによって形成されるものであり、平板部36aaと、平板部36aaの一端から延び、半田34eを介してベアチップFET35のソース電極Sに接続される接続部36abと、平板部36aaの他端から延び、半田34bを介して配線パターン33bに接続される接続部36acとを備えている。
第2ソース電極用銅コネクタ36a2の平板部36aaは、エアーによる吸着装置の吸着面を構成する。このため、平板部aaを利用してエアーによる吸着を行うことができる。
このように構成された半導体モジュール30は、図3に示すように、ケース20の半導体モジュール載置部21上に複数の取付けねじ38により取り付けられる。半導体モジュール30の基板31には、取付けねじ38が挿通する複数の貫通孔31aが形成されている。
更に、カバー70は、半導体モジュール30、制御回路基板40、電力及び信号用コネクタ50、及び3相出力用コネクタ60が取り付けられたケース20に対し、制御回路基板40の上方から当該制御回路基板40を覆うように取り付けられる。
半導体モジュール30の製造に際し、先ず、金属製の基板31の一方の主面上に絶縁層32を形成する(絶縁層形成工程)。
次いで、絶縁層32上に複数の配線パターン33a〜33dを形成する(配線パターン形成工程)。
その後、複数の配線パターン33a〜33d上にそれぞれ半田ペースト(半田34a〜34d)を塗布する(半田ペースト塗布工程)。
その後、ベアチップFET35のソース電極S上に塗布された半田ペースト(半田34e)上及び複数の配線パターン33a〜33dのうちベアチップFET35が搭載された配線パターン33a以外の他の配線パターン33b上に塗布された半田ペースト(半田34b)上に、ソース電極用銅コネクタ36a(第1ソース電極用銅コネクタ36a1及び第2ソース電極用銅コネクタ36a2のうちから選択されたソース電極用銅コネクタ)を搭載する(ソース電極用銅コネクタ搭載工程)。
ここで、ベアチップFET35のソース電極Sと基板31上の配線パターン33bとの接続をソース電極用銅コネクタ36aを用い、ベアチップFET35のゲート電極Gと基板31上の別の配線パターン33cとの接続をゲート電極用銅コネクタ36bを用いることにより、半田実装作業で行えるので、ベアチップFET35のソース電極Sと基板31上の配線パターン33bとの接続及びベアチップFET35のゲート電極Gと基板31上の別の配線パターン33cとの接続を、ベアチップFET35やその他の表面実装部品37を基板31上の配線パターン33a,33d上に実装する際に行われる半田実装作業と同一の工程で行うことができる。このため、半導体モジュール30の製造タクトを短くすることができるとともに、ワイヤボンディングの専用設備が不要になり、半導体モジュール30の製造コストを安価にすることができる。
例えば、半導体モジュール30においてベアチップFET35を用いているが、ベアチップFET35に限らず、ベアチップIGBTなどの他のベアチップトランジスタを用いてもよい。そして、その他のベアチップトランジスタを用いる場合には、銅コネクタにより、ベアチップトランジスタの上面に形成された電極上と複数の配線パターンのうちベアチップトランジスタが接続された配線パターン以外の他の配線パターン上とを半田を介して接続すればよい。これにより、ベアチップトランジスタの電極と基板上の配線パターンとの接続をベアチップトランジスタやその他の表面実装部品を基板上の配線パターン上に実装する際に行われる半田実装作業と同一の工程で行うことができる。
このように、ベアチップIGBTを用い、ベアチップIGBT上に形成されたエミッタ電極及びゲート電極を、それぞれ、銅コネクタを用いて基板上の配線パターンに半田を介して接続する場合には、ベアチップIGBTのエミッタ電極と基板上の配線パターンとの接続及びベアチップIGBTのゲート電極と基板上の別の配線パターンとの接続をベアチップIGBTやその他の表面実装部品を基板上の配線パターン上に実装する際に行われる半田実装作業と同一の工程で行うことができる。
なお、図4に示す半導体モジュール30において、a相出力ライン91a、b相出力ライン91b、及びc相出力ライン91cには、ジャンパー線として共通の銅コネクタ36cが用いられている。これにより、a相出力ライン91a、b相出力ライン91b、及びc相出力ライン91cの径路の長さを同一にすることができる。
2 コラム軸
3 減速ギア3
4A,4B ユニバーサルジョイント
5 ピニオンラック機構
6 タイトロッド
7 トルクセンサ
8 電動モータ
9 車速センサ
10 コントローラ
11 制御演算装置
12 ゲート駆動回路
13 モータ駆動部
14 非常停止用の遮断装置
15 電流検出回路
16 回転センサ
17 ロータ位置検出回路
18 IGN電圧モニタ部
19 電源回路部
20 ケース
21 半導体モジュール載置部
21a ねじ孔
22 電力及び信号用コネクタ実装部
23 3相出力用コネクタ実装部
23a ねじ孔
24 取付けポスト
24a ねじ孔
30 半導体モジュール
31 基板
31a 貫通孔
32 絶縁層
33a〜33d 配線パターン
34a〜34d 半田
35 ベアチップFET(ベアチップトランジスタ)
36a ソース電極用銅コネクタ
36a1 第1ソース電極用銅コネクタ
36a2 第2ソース電極用コネクタ
36c 銅コネクタ
36aa 平板部
36ab 接続部
36ac 接続部
36ad 連結部
36ae 連結部
36af 識別用孔
36b ゲート電極用銅コネクタ
36ba 平板部
36bb 接続部
36bc 接続部
36bd 連結部
36be 連結部
37 表面実装部品
38 取付けねじ
39 放熱用シート
40 制御回路基板
40a 貫通孔
41 取付けねじ
50 電力及び信号用コネクタ
51 取付けねじ
60 3相出力用コネクタ
60a 貫通孔
61 取付けねじ
70 カバー
81電源ライン
81a 正極端子
82 接地ライン
82a 負極端子
90 3相出力部
91a a相出力ライン
91b b相出力ライン
91c c相出力ライン
G ゲート電極(電極)
S ソース電極(電極)
図14に示す半導体モジュール100は、金属製の基板101と、基板101の凹部の底部平坦面上に設けられた樹脂102と、樹脂102上に形成された複数の銅箔(配線パターン)103a,103b,103c,103dとを備えている。銅箔103a及び銅箔103cと銅箔103dとの間には、溝109が形成されている。そして、複数の銅箔103a,103b,103c,103dのうち銅箔103a,103bの上には、熱緩衝板104a,104bがそれぞれ形成され、熱緩衝板104a,104b上には、IGBT105a,105bがそれぞれ形成されている。各IGBT105a,105bは、ベアチップIGBT(ベアチップトランジスタ)である。
また、樹脂102、銅箔103a,103b,103c、熱緩衝板104a,104b、IGBT105a,105b、及び配線106a,106bは、ゲル107によって封入されている。また、基板101の凹部を覆う蓋108が基板101の上部に固定されている。
図15に示す半導体モジュール200において、基板(図示せず)上には複数の導電パッド201,202が形成されている。そして、複数の導電パッド201,202のうちの一つの導電パッド201上にはMOSチップ203が半田接合されている。また、MOSチップ203の上面には、複数のソース電極205及び単一のゲート電極204が形成され、MOSチップ203の下面には図示しないドレイン電極が形成されている。
即ち、図14に示した半導体モジュール100の場合、IGBT105aのエミッタと銅箔103bとの接合及びIGBT105bのエミッタと銅箔103cとの接合につき、ワイヤで構成される配線106a,106bを用いて接合している。このワイヤを用いた接合は、ワイヤボンディング装置(図示せず)を使用して行われるため、配線106a,106bを実装する作業が、IGBT105a,105bやその他の表面実装部品を基板上の配線パターン上に実装する際に行われる半田実装作業と異なり、製造工程が別になってしまうという問題があった。ワイヤボンディングによる実装作業が、半田実装作業と異なり、別の製造工程を要すると、製造タクトが長くなるとともに、ワイヤボンディングの専用設備が必要になり、製造コストが高くなってしまうという問題があった。
また、この半導体モジュールにおいて、前記ベアチップトランジスタが、上面にソース電極及びゲート電極を形成したベアチップFETであり、前記銅コネクタが、ソース電極用銅コネクタと、ゲート電極用銅コネクタとを備え、前記ベアチップFETのソース電極上と前記複数の配線パターンのうち他の配線パターン上とを前記ソース電極用銅コネクタで半田を介して接合し、前記ベアチップFETのゲート電極上と前記複数の配線パターンのうち更に他の配線パターン上とを前記ゲート電極用銅コネクタで半田を介して接合することが好ましい。
更に、この半導体モジュールにおいて、前記第1ソース電極用銅コネクタは、前記長方形状に形成されたソース電極の短辺が延びる方向に沿って引き出されるとともに、当該ソース電極の短辺及び長辺に沿う短辺及び長辺を有する、前記ソース電極に接合する接合面の面積が前記ソース電極とほぼ同一の面積である接合部を備えることが好ましい。
また、この半導体モジュールにおいて、前記第2ソース電極用銅コネクタは、前記長方形状に形成されたソース電極の長辺が延びる方向に沿って引き出されるとともに、当該ソース電極の長辺及び短辺に沿う長辺及び短辺を有する、前記ソース電極に接合する接合面の面積が前記ソース電極とほぼ同一の面積である接合部を備えることが好ましい。
この半導体モジュールによれば、ゲート電極用銅コネクタに対して90°直角配置とする第2ソース電極用銅コネクタとベアチップFETの上面に形成されたソース電極との接合信頼性を確保できる。
また、本発明の更に別の態様に係る半導体モジュールは、基板上に実装されるベアチップトランジスタの配置に自由度が生まれ、基板上の配線の設計の自由度が増大し、基板上における半導体モジュールのレイアウトをコンパクトにすることができるように、1つのベアチップFETにおいて、1種類のゲート電極用銅コネクタと、ゲート電極用銅コネクタに対して180°ストレート配置とする第1ソース電極用銅コネクタと、前記ゲート電極用銅コネクタに対して90°直角配置とする第2ソース電極用銅コネクタとの2種類の第1ソース電極用銅コネクタ及び第2ソース電極用銅コネクタのうちから選択されたいずれか一方のソース電極用銅コネクタとを組み合わせて使用することを特徴とする。
トルクセンサ7で検出された操舵トルクTs及び車速センサ9で検出された車速Vは制御演算部としての制御演算装置11に入力され、制御演算装置11で演算された電流指令値をゲート駆動回路12に入力する。ゲート駆動回路12で、電流指令値等に基づいて形成されたゲート駆動信号はFETのブリッジ構成で成るモータ駆動部13に入力され、モータ駆動部13は非常停止用の遮断装置14を経て3相ブラシレスモータで構成される電動モータ8を駆動する。3相ブラシレスモータの各相電流は電流検出回路15で検出され、検出された3相のモータ電流ia〜icは制御演算装置11にフィードバック電流として入力される。また、3相ブラシレスモータには、ホールセンサ等の回転センサ16が取り付けられており、回転センサ16からの回転信号RTがロータ位置検出回路17に入力され、検出された回転位置θが制御演算装置11に入力される。
また、ソース電極用銅コネクタ36aは、図6(A)に示すように、ゲート電極用銅コネクタ36bに対して180°ストレート配置とする第1ソース電極用銅コネクタ36a1と、図6(B)に示すようにゲート電極用銅コネクタ36bに対して90°直角配置とする第2ソース電極用銅コネクタ36a2との2種類ある。そして、第1ソース電極用銅コネクタ36a1は、図4におけるFETTr2、Tr4、及びTr6において図7に示す矢印A’方向に引き出されて接合される。また、第2ソース電極用銅コネクタ36a2は、図4におけるFETTr1において図7に示す矢印B方向に引き出されて接合され、図4におけるFETTr3及びTr5において図7に示す矢印B’方向に引き出されて接合される。
これにより、基板31上に実装されるベアチップFET35の配置に自由度が生まれ、基板31上の配線の設計の自由度が増大し、基板31上における半導体モジュール30のレイアウトをコンパクトにすることができる。また、基板31上における3相モータの各相の径路の長さ(a相出力ライン91aの長さ、b相出力ライン91bの長さ、及びc相出力ライン91cの長さ)を同一にすることを容易に行うことができる。これにより、3相モータの各相特性、特に、インピーダンス特性を容易に一致させることができ、トルクや速度等のリップル精度を向上することが可能になる。
ゲート電極用銅コネクタ36bは、銅板を打抜き及び曲げ加工することによって形成されるものであり、平板部36baと、平板部36baの一端から延び、半田34fを介してベアチップFET35のゲート電極Gに接合される接合部36bbと、平板部36baの他端から延び、半田34cを介して配線パターン33cに接合される接合部36bcとを備えている。
また、ゲート電極用銅コネクタ36bの接合部36bbは、平板部36baの一端から斜め下方に延びる連結片36bdの下端に外方に延びるように形成されている。この接合部36bbは、ゲート電極Gの短辺及び長辺に沿う短辺及び長辺を有し、ゲート電極Gに接合する接合面の面積がゲート電極Gの面積とほぼ同一の面積を有する。接合部36bbのゲート電極Gに接合する接合面の面積がゲート電極Gとほぼ同じとすることにより、ゲート電極用銅コネクタ36bとゲート電極Gとの接合信頼性を確保することができる。
第1ソース電極用銅コネクタ36a1は、銅板を打抜き及び曲げ加工することによって形成されるものであり、平板部36aaと、平板部36aaの一端から延び、半田34eを介してベアチップFET35のソース電極Sに接合される接合部36abと、平板部36aaの他端から延び、半田34bを介して配線パターン33bに接合される接合部36acとを備えている。
第1ソース電極用銅コネクタ36a1の平板部36aaは、エアーによる吸着装置の吸着面を構成する。このため、平板部aaを利用してエアーによる吸着を行うことができる。この平板部36aaには、第2ソース電極用銅コネクタ36a2との識別のための識別用孔36afが形成されている。
第2ソース電極用銅コネクタ36a2は、銅板を打抜き及び曲げ加工することによって形成されるものであり、平板部36aaと、平板部36aaの一端から延び、半田34eを介してベアチップFET35のソース電極Sに接合される接合部36abと、平板部36aaの他端から延び、半田34bを介して配線パターン33bに接合される接合部36acとを備えている。
第2ソース電極用銅コネクタ36a2の平板部36aaは、エアーによる吸着装置の吸着面を構成する。このため、平板部aaを利用してエアーによる吸着を行うことができる。
このように構成された半導体モジュール30は、図3に示すように、ケース20の半導体モジュール載置部21上に複数の取付けねじ38により取り付けられる。半導体モジュール30の基板31には、取付けねじ38が挿通する複数の貫通孔31aが形成されている。
更に、カバー70は、半導体モジュール30、制御回路基板40、電力及び信号用コネクタ50、及び3相出力用コネクタ60が取り付けられたケース20に対し、制御回路基板40の上方から当該制御回路基板40を覆うように取り付けられる。
半導体モジュール30の製造に際し、先ず、金属製の基板31の一方の主面上に絶縁層32を形成する(絶縁層形成工程)。
次いで、絶縁層32上に複数の配線パターン33a〜33dを形成する(配線パターン形成工程)。
その後、複数の配線パターン33a〜33d上にそれぞれ半田ペースト(半田34a〜34d)を塗布する(半田ペースト塗布工程)。
その後、ベアチップFET35のソース電極S上に塗布された半田ペースト(半田34e)上及び複数の配線パターン33a〜33dのうちベアチップFET35が搭載された配線パターン33a以外の他の配線パターン33b上に塗布された半田ペースト(半田34b)上に、ソース電極用銅コネクタ36a(第1ソース電極用銅コネクタ36a1及び第2ソース電極用銅コネクタ36a2のうちから選択されたソース電極用銅コネクタ)を搭載する(ソース電極用銅コネクタ搭載工程)。
ここで、ベアチップFET35のソース電極Sと基板31上の配線パターン33bとの接合をソース電極用銅コネクタ36aを用い、ベアチップFET35のゲート電極Gと基板31上の別の配線パターン33cとの接合をゲート電極用銅コネクタ36bを用いることにより、半田実装作業で行えるので、ベアチップFET35のソース電極Sと基板31上の配線パターン33bとの接合及びベアチップFET35のゲート電極Gと基板31上の別の配線パターン33cとの接合を、ベアチップFET35やその他の表面実装部品37を基板31上の配線パターン33a,33d上に実装する際に行われる半田実装作業と同一の工程で行うことができる。このため、半導体モジュール30の製造タクトを短くすることができるとともに、ワイヤボンディングの専用設備が不要になり、半導体モジュール30の製造コストを安価にすることができる。
例えば、半導体モジュール30においてベアチップFET35を用いているが、ベアチップFET35に限らず、ベアチップIGBTなどの他のベアチップトランジスタを用いてもよい。そして、その他のベアチップトランジスタを用いる場合には、銅コネクタにより、ベアチップトランジスタの上面に形成された電極上と複数の配線パターンのうちベアチップトランジスタが接合された配線パターン以外の他の配線パターン上とを半田を介して接合すればよい。これにより、ベアチップトランジスタの電極と基板上の配線パターンとの接合をベアチップトランジスタやその他の表面実装部品を基板上の配線パターン上に実装する際に行われる半田実装作業と同一の工程で行うことができる。
このように、ベアチップIGBTを用い、ベアチップIGBT上に形成されたエミッタ電極及びゲート電極を、それぞれ、銅コネクタを用いて基板上の配線パターンに半田を介して接合する場合には、ベアチップIGBTのエミッタ電極と基板上の配線パターンとの接合及びベアチップIGBTのゲート電極と基板上の別の配線パターンとの接合をベアチップIGBTやその他の表面実装部品を基板上の配線パターン上に実装する際に行われる半田実装作業と同一の工程で行うことができる。
なお、図4に示す半導体モジュール30において、a相出力ライン91a、b相出力ライン91b、及びc相出力ライン91cには、ジャンパー線として共通の銅コネクタ36cが用いられている。これにより、a相出力ライン91a、b相出力ライン91b、及びc相出力ライン91cの径路の長さを同一にすることができる。
2 コラム軸
3 減速ギア3
4A,4B ユニバーサルジョイント
5 ピニオンラック機構
6 タイトロッド
7 トルクセンサ
8 電動モータ
9 車速センサ
10 コントローラ
11 制御演算装置
12 ゲート駆動回路
13 モータ駆動部
14 非常停止用の遮断装置
15 電流検出回路
16 回転センサ
17 ロータ位置検出回路
18 IGN電圧モニタ部
19 電源回路部
20 ケース
21 半導体モジュール載置部
21a ねじ孔
22 電力及び信号用コネクタ実装部
23 3相出力用コネクタ実装部
23a ねじ孔
24 取付けポスト
24a ねじ孔
30 半導体モジュール
31 基板
31a 貫通孔
32 絶縁層
33a〜33d 配線パターン
34a〜34d 半田
35 ベアチップFET(ベアチップトランジスタ)
36a ソース電極用銅コネクタ
36a1 第1ソース電極用銅コネクタ
36a2 第2ソース電極用コネクタ
36c 銅コネクタ
36aa 平板部
36ab 接合部
36ac 接合部
36ad 連結部
36ae 連結部
36af 識別用孔
36b ゲート電極用銅コネクタ
36ba 平板部
36bb 接合部
36bc 接合部
36bd 連結部
36be 連結部
37 表面実装部品
38 取付けねじ
39 放熱用シート
40 制御回路基板
40a 貫通孔
41 取付けねじ
50 電力及び信号用コネクタ
51 取付けねじ
60 3相出力用コネクタ
60a 貫通孔
61 取付けねじ
70 カバー
81電源ライン
81a 正極端子
82 接地ライン
82a 負極端子
90 3相出力部
91a a相出力ライン
91b b相出力ライン
91c c相出力ライン
G ゲート電極(電極)
S ソース電極(電極)
また、ゲート電極用銅コネクタ36bの接合部36bbは、平板部36baの一端から斜め下方に延びる連結片36bdの下端に外方に延びるように形成されている。この接合部36bbは、ゲート電極Gの短辺及び長辺に沿う短辺及び長辺を有し、ゲート電極Gに接合する接合面の面積がゲート電極Gの面積とほぼ同一の面積を有する。接合部36bbのゲート電極Gに接合する接合面の面積がゲート電極Gとほぼ同じとすることにより、ゲート電極用銅コネクタ36bとゲート電極Gとの接合信頼性を確保することができる。
第2ソース電極用銅コネクタ36a2は、銅板を打抜き及び曲げ加工することによって形成されるものであり、平板部36aaと、平板部36aaの一端から延び、半田34eを介してベアチップFET35のソース電極Sに接合される接合部36abと、平板部36aaの他端から延び、半田34bを介して配線パターン33bに接合される接合部36acとを備えている。
第2ソース電極用銅コネクタ36a2の平板部36aaは、エアーによる吸着装置の吸着面を構成する。このため、平板部36aaを利用してエアーによる吸着を行うことができる。
Claims (9)
- 金属製の基板と、該基板の上に形成された絶縁層と、該絶縁層上に形成された複数の配線パターンと、該複数の配線パターンのうち一つの配線パターン上に半田を介して実装されるベアチップトランジスタと、該ベアチップトランジスタの上面に形成された電極と前記複数の配線パターンのうち他の配線パターンとを半田を介して接続するための、銅板で構成される銅コネクタとを備えたことを特徴とする半導体モジュール。
- 前記ベアチップトランジスタが、上面にソース電極及びゲート電極を形成したベアチップFETであり、前記銅コネクタが、ソース電極用銅コネクタと、ゲート電極用銅コネクタとを備え、前記ベアチップFETのソース電極上と前記複数の配線パターンのうち他の配線パターン上とを前記ソース電極用銅コネクタで半田を介して接続し、前記ベアチップFETのゲート電極上と前記複数の配線パターンのうち更に他の配線パターン上とを前記ゲート電極用銅コネクタで半田を介して接続することを特徴とする請求項1記載の半導体モジュール。
- 前記ゲート電極用銅コネクタは1種類であり、前記ソース電極用銅コネクタは、前記ゲート電極用銅コネクタに対して180°ストレート配置とする第1ソース電極用銅コネクタと、前記ゲート電極用銅コネクタに対して90°直角配置とする第2ソース電極用銅コネクタとの2種類であり、1つのベアチップFETにおいて、前記1種類のゲート電極用銅コネクタと前記2種類の第1ソース電極用銅コネクタ及び第2ソース電極用銅コネクタのうちから選択されたいずれか一方のソース電極用銅コネクタとを組み合わせて使用することを特徴とする請求項2記載の半導体モジュール。
- 前記ベアチップFETの上面に形成された前記ゲート電極と前記ソース電極とが直列にストレート配置され、前記ソース電極は長方形状に形成されていることを特徴とする請求項3記載の半導体モジュール。
- 前記第1ソース電極用銅コネクタは、前記長方形状に形成されたソース電極の短辺が延びる方向に沿って引き出されるとともに、当該ソース電極の短辺及び長辺に沿う短辺及び長辺を有する、前記ソース電極に接続する接続面の面積が前記ソース電極とほぼ同一の面積である接続部を備えたことを特徴とする請求項4記載の半導体モジュール。
- 前記第2ソース電極用銅コネクタは、前記長方形状に形成されたソース電極の長辺が延びる方向に沿って引き出されるとともに、当該ソース電極の長辺及び短辺に沿う長辺及び短辺を有する、前記ソース電極に接続する接続面の面積が前記ソース電極とほぼ同一の面積である接続部を備えたことを特徴とする請求項4又は5記載の半導体モジュール。
- 金属製の基板上に絶縁層を形成する工程と、
該絶縁層上に複数の配線パターンを形成する工程と、
該複数の配線パターン上に半田ペーストを塗布する工程と、
前記複数の配線パターンのうち一つの配線パターン上に塗布された半田ペースト上にベアチップトランジスタを搭載する工程と、
前記ベアチップトランジスタの上面に形成された電極上に半田ペーストを塗布する工程と、
前記ベアチップトランジスタの電極上に塗布された半田ペースト上及び前記複数の配線パターンのうち他の配線パターン上に塗布された半田ペースト上に、銅板で構成される銅コネクタを搭載して半導体モジュール中間組立体を構成する工程と、
該半導体モジュール中間組立体をリフロー炉に入れて、前記複数の配線パターンのうち一つの配線パターンと前記ベアチップトランジスタとの半田を介しての接合、前記ベアチップトランジスタの上面に形成された電極と前記銅コネクタとの半田を介しての接合、及び前記複数の配線パターンのうち他の配線パターンと前記銅コネクタとの半田を介しての接合を行う工程とを含むことを特徴とする半導体モジュールの製造方法。 - 前記ベアチップトランジスタが、上面にソース電極及びゲート電極を形成したベアチップFETであり、前記銅コネクタが、ソース電極用銅コネクタと、ゲート電極用銅コネクタとを備えており、
金属製の前記基板上に前記絶縁層を形成する工程と、
該絶縁層上に複数の配線パターンを形成する工程と、
該複数の配線パターン上に半田ペーストを塗布する工程と、
前記複数の配線パターンのうち一つの配線パターン上に塗布された半田ペースト上に前記ベアチップFETを搭載する工程と、
前記ベアチップFETの上面に形成されたソース電極及びゲート電極上に半田ペーストを塗布する工程と、
前記ベアチップFETのソース電極上に塗布された半田ペースト上及び前記複数の配線パターンのうち他の配線パターン上に塗布された半田ペースト上に、前記ソース電極用銅コネクタを搭載する工程と、
前記ベアチップFETのゲート電極上に塗布された半田ペースト上及び前記複数の配線パターンのうち更に他の配線パターン上に塗布された半田ペースト上に、前記ゲート電極用銅コネクタを搭載して半導体モジュール中間組立体を構成する工程と、
該半導体モジュール中間組立体をリフロー炉に入れて、前記複数の配線パターンのうち一つの配線パターンと前記ベアチップFETとの半田を介しての接合、前記ベアチップFETの上面に形成されたソース電極と前記ソース電極用銅コネクタとの半田を介しての接合、前記複数の配線パターンのうち他の配線パターンと前記ソース電極用銅コネクタとの半田を介しての接合、前記ベアチップFETの上面に形成されたゲート電極と前記ゲート電極用銅コネクタとの半田を介しての接合、及び前記複数の配線パターンのうち更に他の配線パターンと前記ゲート電極用銅コネクタとの半田を介しての接合を行う工程とを含むことを特徴とする請求項7記載の半導体モジュールの製造方法。 - 前記ゲート電極用銅コネクタは1種類であり、前記ソース電極用銅コネクタは、前記ゲート電極用銅コネクタに対して180°ストレート配置とする第1ソース電極用銅コネクタと、前記ゲート電極用銅コネクタに対して90°直角配置とする第2ソース電極用銅コネクタとの2種類であり、1つのベアチップFETにおいて、前記1種類のゲート電極用銅コネクタと前記2種類の第1ソース電極用銅コネクタ及び第2ソース電極用銅コネクタのうちから選択されたいずれか一方のソース電極用銅コネクタとを組み合わせて使用することを特徴とする請求項8記載の半導体モジュールの製造方法。
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Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03195053A (ja) * | 1989-12-25 | 1991-08-26 | Sanyo Electric Co Ltd | インバータ装置 |
JPH06268027A (ja) * | 1993-03-11 | 1994-09-22 | Hitachi Ltd | 半導体装置 |
JPH1012812A (ja) * | 1996-06-20 | 1998-01-16 | Toshiba Corp | 電力用半導体装置 |
JP2001346384A (ja) * | 2000-05-31 | 2001-12-14 | Mitsubishi Electric Corp | パワーモジュール |
JP2002043508A (ja) * | 2000-07-25 | 2002-02-08 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2007243157A (ja) * | 2006-02-09 | 2007-09-20 | Diamond Electric Mfg Co Ltd | 半導体モジュール及びこれを備える半導体装置、並びに、半導体モジュールの製造方法 |
JP2009021395A (ja) * | 2007-07-12 | 2009-01-29 | Panasonic Corp | 半導体装置 |
WO2009066546A1 (ja) * | 2007-11-20 | 2009-05-28 | Aisin Aw Co., Ltd. | モータの制御装置 |
JP2010195219A (ja) * | 2009-02-25 | 2010-09-09 | Nsk Ltd | 電動パワーステアリング装置 |
JP2011204886A (ja) * | 2010-03-25 | 2011-10-13 | Panasonic Corp | 半導体装置及びその製造方法 |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS447543Y1 (ja) * | 1966-04-04 | 1969-03-22 | ||
US5872403A (en) * | 1997-01-02 | 1999-02-16 | Lucent Technologies, Inc. | Package for a power semiconductor die and power supply employing the same |
JP3439417B2 (ja) * | 2000-03-23 | 2003-08-25 | Necエレクトロニクス株式会社 | 半導体パッケージ用接続導体、半導体パッケージ、及び半導体パッケージの組立方法 |
JP2002217416A (ja) * | 2001-01-16 | 2002-08-02 | Hitachi Ltd | 半導体装置 |
JP2003023137A (ja) * | 2001-07-09 | 2003-01-24 | Sansha Electric Mfg Co Ltd | 電力用半導体モジュール |
JP4074991B2 (ja) * | 2003-03-18 | 2008-04-16 | 富士電機ホールディングス株式会社 | 交流−交流電力変換装置 |
JP4075992B2 (ja) | 2003-05-07 | 2008-04-16 | トヨタ自動車株式会社 | 半導体モジュールの製造方法、半導体モジュール、それを用いた一体型モータおよび一体型モータを備える自動車 |
JP4764692B2 (ja) * | 2005-09-29 | 2011-09-07 | 日立オートモティブシステムズ株式会社 | 半導体モジュール |
JP2007235004A (ja) * | 2006-03-03 | 2007-09-13 | Mitsubishi Electric Corp | 半導体装置 |
US8786072B2 (en) * | 2007-02-27 | 2014-07-22 | International Rectifier Corporation | Semiconductor package |
JP5098440B2 (ja) * | 2007-05-25 | 2012-12-12 | 三菱電機株式会社 | 電力半導体装置の製造方法 |
JP2009231805A (ja) * | 2008-02-29 | 2009-10-08 | Renesas Technology Corp | 半導体装置 |
JP2010034350A (ja) * | 2008-07-30 | 2010-02-12 | Sanyo Electric Co Ltd | 半導体装置 |
JP5285348B2 (ja) * | 2008-07-30 | 2013-09-11 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 回路装置 |
JP5384913B2 (ja) * | 2008-11-18 | 2014-01-08 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
DE102008054735A1 (de) * | 2008-12-16 | 2010-06-17 | Robert Bosch Gmbh | Leadless-Gehäusepackung |
JP5388661B2 (ja) * | 2009-04-03 | 2014-01-15 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
JP2011014890A (ja) * | 2009-06-02 | 2011-01-20 | Mitsubishi Chemicals Corp | 金属基板及び光源装置 |
JP5383621B2 (ja) * | 2010-10-20 | 2014-01-08 | 三菱電機株式会社 | パワー半導体装置 |
KR101204187B1 (ko) * | 2010-11-02 | 2012-11-23 | 삼성전기주식회사 | 소성 접합을 이용한 파워 모듈 및 그 제조 방법 |
JP2012212713A (ja) * | 2011-03-30 | 2012-11-01 | Toshiba Corp | 半導体装置の実装構造 |
JP6043049B2 (ja) * | 2011-03-30 | 2016-12-14 | 株式会社東芝 | 半導体装置の実装構造及び半導体装置の実装方法 |
JP5388235B2 (ja) * | 2011-04-08 | 2014-01-15 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US8399997B2 (en) * | 2011-06-10 | 2013-03-19 | Shanghai Kalhong Electronic Company Limited | Power package including multiple semiconductor devices |
CN103918066B (zh) * | 2012-11-05 | 2016-08-24 | 日本精工株式会社 | 半导体模块 |
-
2013
- 2013-05-27 EP EP13797985.2A patent/EP2858100B1/en active Active
- 2013-05-27 CN CN201380003744.2A patent/CN103918067B/zh active Active
- 2013-05-27 WO PCT/JP2013/003332 patent/WO2013179638A1/ja active Application Filing
- 2013-05-27 JP JP2014518275A patent/JP5871064B2/ja active Active
- 2013-05-27 US US14/127,187 patent/US9312234B2/en active Active
-
2015
- 2015-11-11 JP JP2015221444A patent/JP6083461B2/ja active Active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03195053A (ja) * | 1989-12-25 | 1991-08-26 | Sanyo Electric Co Ltd | インバータ装置 |
JPH06268027A (ja) * | 1993-03-11 | 1994-09-22 | Hitachi Ltd | 半導体装置 |
JPH1012812A (ja) * | 1996-06-20 | 1998-01-16 | Toshiba Corp | 電力用半導体装置 |
JP2001346384A (ja) * | 2000-05-31 | 2001-12-14 | Mitsubishi Electric Corp | パワーモジュール |
JP2002043508A (ja) * | 2000-07-25 | 2002-02-08 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2007243157A (ja) * | 2006-02-09 | 2007-09-20 | Diamond Electric Mfg Co Ltd | 半導体モジュール及びこれを備える半導体装置、並びに、半導体モジュールの製造方法 |
JP2009021395A (ja) * | 2007-07-12 | 2009-01-29 | Panasonic Corp | 半導体装置 |
WO2009066546A1 (ja) * | 2007-11-20 | 2009-05-28 | Aisin Aw Co., Ltd. | モータの制御装置 |
JP2010195219A (ja) * | 2009-02-25 | 2010-09-09 | Nsk Ltd | 電動パワーステアリング装置 |
JP2011204886A (ja) * | 2010-03-25 | 2011-10-13 | Panasonic Corp | 半導体装置及びその製造方法 |
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