JPWO2013069767A1 - 発光素子用基板、発光モジュールおよび発光モジュールの製造方法 - Google Patents

発光素子用基板、発光モジュールおよび発光モジュールの製造方法 Download PDF

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Publication number
JPWO2013069767A1
JPWO2013069767A1 JP2013543041A JP2013543041A JPWO2013069767A1 JP WO2013069767 A1 JPWO2013069767 A1 JP WO2013069767A1 JP 2013543041 A JP2013543041 A JP 2013543041A JP 2013543041 A JP2013543041 A JP 2013543041A JP WO2013069767 A1 JPWO2013069767 A1 JP WO2013069767A1
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Japan
Prior art keywords
layer
light emitting
emitting element
alloy
lead frame
Prior art date
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JP2013543041A
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English (en)
Japanese (ja)
Inventor
晋司 山本
晋司 山本
啓太 渡辺
啓太 渡辺
石尾 雅昭
雅昭 石尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Proterial Ltd
Proterial Metals Ltd
Original Assignee
Hitachi Metals Ltd
Neomax Materials Co Ltd
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Publication date
Application filed by Hitachi Metals Ltd, Neomax Materials Co Ltd filed Critical Hitachi Metals Ltd
Priority to JP2013543041A priority Critical patent/JPWO2013069767A1/ja
Publication of JPWO2013069767A1 publication Critical patent/JPWO2013069767A1/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48237Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a die pad of the item
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
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    • H01L2924/181Encapsulation
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    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • H01L33/60Reflective elements

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2013543041A 2011-11-11 2012-11-09 発光素子用基板、発光モジュールおよび発光モジュールの製造方法 Pending JPWO2013069767A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2013543041A JPWO2013069767A1 (ja) 2011-11-11 2012-11-09 発光素子用基板、発光モジュールおよび発光モジュールの製造方法

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JP2011247645 2011-11-11
JP2011247645 2011-11-11
JP2013543041A JPWO2013069767A1 (ja) 2011-11-11 2012-11-09 発光素子用基板、発光モジュールおよび発光モジュールの製造方法

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JP (1) JPWO2013069767A1 (zh)
KR (1) KR101860173B1 (zh)
CN (1) CN103931006B (zh)
TW (1) TW201327909A (zh)
WO (1) WO2013069767A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6337452B2 (ja) * 2013-12-06 2018-06-06 日立金属株式会社 半導体素子形成用基板および半導体素子形成用基板の製造方法
US10950768B2 (en) * 2017-04-27 2021-03-16 Kyocera Corporation Circuit board and light-emitting device provided with same

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0290663A (ja) * 1988-09-28 1990-03-30 Hitachi Cable Ltd リードフレーム
JPH06224346A (ja) * 1993-01-23 1994-08-12 Toppan Printing Co Ltd エッチング方法
JPH1041423A (ja) * 1996-07-22 1998-02-13 Sony Corp 半導体パッケージの製造方法
JP2001024228A (ja) * 1999-07-06 2001-01-26 Nichia Chem Ind Ltd 発光装置
JP2002280616A (ja) * 2001-03-16 2002-09-27 Nichia Chem Ind Ltd パッケージ成形体及びそれを用いた発光装置
JP2008127606A (ja) * 2006-11-17 2008-06-05 Kobe Steel Ltd 酸化膜密着性に優れた高強度銅合金板
WO2010150824A1 (ja) * 2009-06-24 2010-12-29 古河電気工業株式会社 光半導体装置用リードフレーム、光半導体装置用リードフレームの製造方法、および光半導体装置
JP2011187586A (ja) * 2010-03-05 2011-09-22 Seiko Instruments Inc 発光デバイス及びその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4058933B2 (ja) * 2001-10-26 2008-03-12 松下電工株式会社 高熱伝導性立体基板の製造方法
CN100505222C (zh) * 2004-11-19 2009-06-24 晶元光电股份有限公司 发光二极管散热基板及其制造方法
KR101088910B1 (ko) * 2008-05-29 2011-12-07 삼성엘이디 주식회사 Led 패키지 및 그 제조방법

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0290663A (ja) * 1988-09-28 1990-03-30 Hitachi Cable Ltd リードフレーム
JPH06224346A (ja) * 1993-01-23 1994-08-12 Toppan Printing Co Ltd エッチング方法
JPH1041423A (ja) * 1996-07-22 1998-02-13 Sony Corp 半導体パッケージの製造方法
JP2001024228A (ja) * 1999-07-06 2001-01-26 Nichia Chem Ind Ltd 発光装置
JP2002280616A (ja) * 2001-03-16 2002-09-27 Nichia Chem Ind Ltd パッケージ成形体及びそれを用いた発光装置
JP2008127606A (ja) * 2006-11-17 2008-06-05 Kobe Steel Ltd 酸化膜密着性に優れた高強度銅合金板
WO2010150824A1 (ja) * 2009-06-24 2010-12-29 古河電気工業株式会社 光半導体装置用リードフレーム、光半導体装置用リードフレームの製造方法、および光半導体装置
JP2011187586A (ja) * 2010-03-05 2011-09-22 Seiko Instruments Inc 発光デバイス及びその製造方法

Also Published As

Publication number Publication date
KR101860173B1 (ko) 2018-06-27
KR20140099438A (ko) 2014-08-12
CN103931006B (zh) 2017-03-01
CN103931006A (zh) 2014-07-16
TW201327909A (zh) 2013-07-01
WO2013069767A1 (ja) 2013-05-16

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