JPS6453911U

JPS6453911U -

Info

Publication number: JPS6453911U
Application number: JP14998787U
Authority: JP
Priority date: 1987-09-30
Filing date: 1987-09-30
Publication date: 1989-04-03

Description

[Brief explanation of the drawing]

第１図はこの考案の一実施例を示す図、第２図
は従来のＲ／Ｄ変換装置を示す図である。図において、１は象限選択回路、２は余弦乗算
器、３は正弦乗算器、４は引き算器、５はアナロ
グ・デイジタル変換器、６は乗算器、７は加算器
、８はレジスタ、９は符号判定器、１０は位相検
波器、１１は電圧制御発振器、１２は可逆カウン
タである。なお、各図中同一符号は同一または相
当部分を示す。 FIG. 1 is a diagram showing an embodiment of this invention, and FIG. 2 is a diagram showing a conventional R/D conversion device. In the figure, 1 is a quadrant selection circuit, 2 is a cosine multiplier, 3 is a sine multiplier, 4 is a subtracter, 5 is an analog-to-digital converter, 6 is a multiplier, 7 is an adder, 8 is a register, and 9 is a 10 is a phase detector, 11 is a voltage controlled oscillator, and 12 is a reversible counter. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims

[Scope of utility model registration request]

A cosine multiplier that receives two signals and multiplies the cosine values of the first and second input signals; and a cosine multiplier that receives two signals and multiplies the sine values of the first and second input signals. a sine multiplier that inputs and subtracts two signals; an analog-to-digital converter that inputs an analog signal and converts it into a multi-bit digital signal; and a multiplier that inputs and multiplies two signals. In a tracking type resolver/digital conversion device that includes a sign determiner that determines the sign of an input signal, an adder that adds two signals, and a register that holds a digital value, a resolver signal is input to a first input terminal. a cosine multiplier that inputs one sine wave signal of the register, inputs the digital signal of the register to a second input terminal, and multiplies the sine wave signal by the value of the cosine of the angle of the digital signal; a sine multiplier that inputs one cosine wave signal of the resolver signal at one end, inputs the digital signal of the register at a second input end, and multiplies the cosine wave signal by the sine value of the angle of the digital signal; a subtracter that inputs the output of the cosine multiplier to a first input terminal, inputs the output of the sine multiplier to a second input terminal, and subtracts the two signals; and an output of the subtracter to the input terminal. an analog-to-digital converter that inputs a reference signal and converts it into a digital signal, a sign determiner that inputs a reference signal to an input terminal and determines its sign, and inputs the output of the analog-to-digital converter to a first input terminal. a multiplier that inputs the output of the sign determiner to a second input terminal and multiplies the two signals; An adder inputs the digital signals of the register and adds them together, a clock is inputted to the first input terminal, the output of the adder is inputted to the second input terminal, and the signal given to the first input terminal is used. 1. A resolver digital conversion device comprising: a register that temporarily holds a signal applied to a second input terminal.