JPS6367246U - - Google Patents

Info

Publication number
JPS6367246U
JPS6367246U JP16199386U JP16199386U JPS6367246U JP S6367246 U JPS6367246 U JP S6367246U JP 16199386 U JP16199386 U JP 16199386U JP 16199386 U JP16199386 U JP 16199386U JP S6367246 U JPS6367246 U JP S6367246U
Authority
JP
Japan
Prior art keywords
semiconductor element
monitoring
semiconductor
sealed
external terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16199386U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16199386U priority Critical patent/JPS6367246U/ja
Publication of JPS6367246U publication Critical patent/JPS6367246U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aはこの考案の一実施例である半導体装
置ならびにシールドキヤツプの上面図、第1図b
は第1図aの側面断面図、第2図aは従来例の半
導体装置ならびにシールドキヤツプの側面断面図
、第2図bは、第2図aの側面断面図である。 1……シールギキヤツプ、2……半導体基板、
3……半導体素子、10……モニタ用パツド、1
4……モニタ用内部リード端子、16……ボンデ
イングワイヤ、17……モニタ用外部端子。
Figure 1a is a top view of a semiconductor device and shield cap that are an embodiment of this invention, Figure 1b
1A is a side sectional view of FIG. 1A, FIG. 2A is a side sectional view of a conventional semiconductor device and a shield cap, and FIG. 2B is a side sectional view of FIG. 2A. 1... Seal cap, 2... Semiconductor substrate,
3... Semiconductor element, 10... Monitor pad, 1
4... Internal lead terminal for monitor, 16... Bonding wire, 17... External terminal for monitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体基板の中央部に複数の凹部を有し、該凹
部の最底面に半導体素子を露出させて載置し、上
部より絶縁性シールドキヤツプで封止する半導体
装置において、前記半導体素子を封止するシール
ドキヤツプにモニタ用外部端子を設け、該モニタ
用外部端子と半導体素子内のモニタ用パツドとを
電気的に接続したことを特徴とする半導体装置。
In a semiconductor device in which a semiconductor substrate has a plurality of recesses in the center thereof, a semiconductor element is placed exposed at the bottom of the recess, and the semiconductor element is sealed from above with an insulating shield cap, the semiconductor element is sealed. A semiconductor device characterized in that a shield cap is provided with an external terminal for monitoring, and the external terminal for monitoring is electrically connected to a monitoring pad within a semiconductor element.
JP16199386U 1986-10-22 1986-10-22 Pending JPS6367246U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16199386U JPS6367246U (en) 1986-10-22 1986-10-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16199386U JPS6367246U (en) 1986-10-22 1986-10-22

Publications (1)

Publication Number Publication Date
JPS6367246U true JPS6367246U (en) 1988-05-06

Family

ID=31088832

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16199386U Pending JPS6367246U (en) 1986-10-22 1986-10-22

Country Status (1)

Country Link
JP (1) JPS6367246U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009175155A (en) * 2002-03-25 2009-08-06 Seiko Epson Corp Electronic component with control terminal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009175155A (en) * 2002-03-25 2009-08-06 Seiko Epson Corp Electronic component with control terminal

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