JPS6190244U - - Google Patents

Info

Publication number
JPS6190244U
JPS6190244U JP1984176011U JP17601184U JPS6190244U JP S6190244 U JPS6190244 U JP S6190244U JP 1984176011 U JP1984176011 U JP 1984176011U JP 17601184 U JP17601184 U JP 17601184U JP S6190244 U JPS6190244 U JP S6190244U
Authority
JP
Japan
Prior art keywords
attached
semiconductor device
semiconductor
semiconductor pellet
insulating frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984176011U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984176011U priority Critical patent/JPS6190244U/ja
Publication of JPS6190244U publication Critical patent/JPS6190244U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4899Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
    • H01L2224/48996Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/48998Alignment aids
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の実施例を示す横断面図であ
る。第2図は、本考案の別の実施例を示す図であ
つてaは側面図、bはその部分の断面図である。 尚、図において、1…パツケージ基体、2…半
導体ペレツト、3…電気絶縁性フレーム、4…金
属細線。
FIG. 1 is a cross-sectional view showing an embodiment of the present invention. FIG. 2 is a diagram showing another embodiment of the present invention, in which a is a side view and b is a sectional view of that portion. In the figure, 1...package base, 2...semiconductor pellet, 3...electrically insulating frame, 4...metal thin wire.

Claims (1)

【実用新案登録請求の範囲】 (1) 電気絶縁性基板に半導体ペレツトを取付け
る構造の半導体装置において、半導体ペレツトを
取付ける部分は凹部となつており、該凹部には前
記半導体ペレツトを囲むように電記絶縁性のフレ
ームが取付けられていることを特徴とする半導体
装置。 (2) 前記電気絶縁性のフレームの上部には各々
の金属細線を収納し得る溝が形成されていること
を特徴とする実用新案登録請求の範囲第(1)項記
載の半導体装置。
[Claims for Utility Model Registration] (1) In a semiconductor device having a structure in which a semiconductor pellet is attached to an electrically insulating substrate, the part where the semiconductor pellet is attached is a recessed part, and the recessed part has an electrically conductive part surrounding the semiconductor pellet. A semiconductor device characterized in that an insulating frame is attached. (2) The semiconductor device according to claim 1, wherein a groove is formed in the upper part of the electrically insulating frame to accommodate each thin metal wire.
JP1984176011U 1984-11-20 1984-11-20 Pending JPS6190244U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984176011U JPS6190244U (en) 1984-11-20 1984-11-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984176011U JPS6190244U (en) 1984-11-20 1984-11-20

Publications (1)

Publication Number Publication Date
JPS6190244U true JPS6190244U (en) 1986-06-12

Family

ID=30733609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984176011U Pending JPS6190244U (en) 1984-11-20 1984-11-20

Country Status (1)

Country Link
JP (1) JPS6190244U (en)

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