JPS6347259B2 - - Google Patents

Info

Publication number
JPS6347259B2
JPS6347259B2 JP56191171A JP19117181A JPS6347259B2 JP S6347259 B2 JPS6347259 B2 JP S6347259B2 JP 56191171 A JP56191171 A JP 56191171A JP 19117181 A JP19117181 A JP 19117181A JP S6347259 B2 JPS6347259 B2 JP S6347259B2
Authority
JP
Japan
Prior art keywords
semiconductor substrates
substrates
pads
ceramic substrate
stacked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56191171A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5892230A (ja
Inventor
Hidenobu Ishikura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56191171A priority Critical patent/JPS5892230A/ja
Publication of JPS5892230A publication Critical patent/JPS5892230A/ja
Publication of JPS6347259B2 publication Critical patent/JPS6347259B2/ja
Granted legal-status Critical Current

Links

Classifications

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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
JP56191171A 1981-11-27 1981-11-27 半導体装置 Granted JPS5892230A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56191171A JPS5892230A (ja) 1981-11-27 1981-11-27 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56191171A JPS5892230A (ja) 1981-11-27 1981-11-27 半導体装置

Publications (2)

Publication Number Publication Date
JPS5892230A JPS5892230A (ja) 1983-06-01
JPS6347259B2 true JPS6347259B2 (zh) 1988-09-21

Family

ID=16270076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56191171A Granted JPS5892230A (ja) 1981-11-27 1981-11-27 半導体装置

Country Status (1)

Country Link
JP (1) JPS5892230A (zh)

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* Cited by examiner, † Cited by third party
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JPS6262451U (zh) * 1985-10-04 1987-04-17
US5614766A (en) * 1991-09-30 1997-03-25 Rohm Co., Ltd. Semiconductor device with stacked alternate-facing chips
US5222014A (en) * 1992-03-02 1993-06-22 Motorola, Inc. Three-dimensional multi-chip pad array carrier
JPH06244231A (ja) * 1993-02-01 1994-09-02 Motorola Inc 気密半導体デバイスおよびその製造方法
EP0631144A1 (en) * 1993-06-24 1994-12-28 Koninklijke Philips Electronics N.V. High voltage differential sensor having a capacitive attenuator
US5385632A (en) * 1993-06-25 1995-01-31 At&T Laboratories Method for manufacturing integrated semiconductor devices
US6365500B1 (en) * 1994-05-06 2002-04-02 Industrial Technology Research Institute Composite bump bonding
US5715144A (en) * 1994-12-30 1998-02-03 International Business Machines Corporation Multi-layer, multi-chip pyramid and circuit board structure
US6014586A (en) * 1995-11-20 2000-01-11 Pacesetter, Inc. Vertically integrated semiconductor package for an implantable medical device
KR100443484B1 (ko) * 1996-02-19 2004-09-18 마츠시타 덴끼 산교 가부시키가이샤 반도체장치및그제조방법
US5907903A (en) * 1996-05-24 1999-06-01 International Business Machines Corporation Multi-layer-multi-chip pyramid and circuit board structure and method of forming same
JP3825181B2 (ja) 1998-08-20 2006-09-20 沖電気工業株式会社 半導体装置の製造方法及び半導体装置
JP2002033441A (ja) * 2000-07-14 2002-01-31 Mitsubishi Electric Corp 半導体装置
JP2002270759A (ja) 2001-03-14 2002-09-20 Matsushita Electric Ind Co Ltd 半導体チップ及びマルチチップモジュール
JP2002373969A (ja) * 2001-06-15 2002-12-26 Oki Electric Ind Co Ltd 半導体装置及び半導体装置の製造方法
JP3794942B2 (ja) 2001-07-09 2006-07-12 松下電器産業株式会社 マルチチップモジュール及びその接続テスト方法
JP2003185710A (ja) 2001-10-03 2003-07-03 Matsushita Electric Ind Co Ltd マルチチップモジュール、半導体チップ及びマルチチップモジュールのチップ間接続テスト方法
WO2003063242A1 (en) * 2002-01-16 2003-07-31 Alfred E. Mann Foundation For Scientific Research Space-saving packaging of electronic circuits
US7211884B1 (en) 2002-01-28 2007-05-01 Pacesetter, Inc. Implantable medical device construction using a flexible substrate
US8089142B2 (en) * 2002-02-13 2012-01-03 Micron Technology, Inc. Methods and apparatus for a stacked-die interposer
US6590282B1 (en) * 2002-04-12 2003-07-08 Industrial Technology Research Institute Stacked semiconductor package formed on a substrate and method for fabrication
AU2003301632A1 (en) * 2002-10-22 2004-05-13 Unitive International Limited Stacked electronic structures including offset substrates
JP2009302212A (ja) 2008-06-11 2009-12-24 Fujitsu Microelectronics Ltd 半導体装置及びその製造方法
KR101774938B1 (ko) 2011-08-31 2017-09-06 삼성전자 주식회사 지지대를 갖는 반도체 패키지 및 그 형성 방법

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5081475A (zh) * 1973-11-19 1975-07-02
JPS51102566A (en) * 1975-03-07 1976-09-10 Suwa Seikosha Kk Shusekikairo
JPS5337383A (en) * 1976-09-20 1978-04-06 Hitachi Ltd Semiconductor integrated circuit
JPS56103455A (en) * 1980-01-22 1981-08-18 Fujitsu Ltd Semiconductor ic device
JPS56137665A (en) * 1980-03-31 1981-10-27 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device
JPS56148857A (en) * 1980-04-18 1981-11-18 Mitsubishi Electric Corp Semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5081475A (zh) * 1973-11-19 1975-07-02
JPS51102566A (en) * 1975-03-07 1976-09-10 Suwa Seikosha Kk Shusekikairo
JPS5337383A (en) * 1976-09-20 1978-04-06 Hitachi Ltd Semiconductor integrated circuit
JPS56103455A (en) * 1980-01-22 1981-08-18 Fujitsu Ltd Semiconductor ic device
JPS56137665A (en) * 1980-03-31 1981-10-27 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device
JPS56148857A (en) * 1980-04-18 1981-11-18 Mitsubishi Electric Corp Semiconductor device

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