JPS6310899B2 - - Google Patents

Info

Publication number
JPS6310899B2
JPS6310899B2 JP57052088A JP5208882A JPS6310899B2 JP S6310899 B2 JPS6310899 B2 JP S6310899B2 JP 57052088 A JP57052088 A JP 57052088A JP 5208882 A JP5208882 A JP 5208882A JP S6310899 B2 JPS6310899 B2 JP S6310899B2
Authority
JP
Japan
Prior art keywords
film
groove
substrate
sio
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57052088A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58168261A (ja
Inventor
Hiroshi Goto
Chuichi Takada
Ryoji Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5208882A priority Critical patent/JPS58168261A/ja
Publication of JPS58168261A publication Critical patent/JPS58168261A/ja
Publication of JPS6310899B2 publication Critical patent/JPS6310899B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
JP5208882A 1982-03-30 1982-03-30 半導体装置の製造方法 Granted JPS58168261A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5208882A JPS58168261A (ja) 1982-03-30 1982-03-30 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5208882A JPS58168261A (ja) 1982-03-30 1982-03-30 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58168261A JPS58168261A (ja) 1983-10-04
JPS6310899B2 true JPS6310899B2 (enrdf_load_stackoverflow) 1988-03-10

Family

ID=12905068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5208882A Granted JPS58168261A (ja) 1982-03-30 1982-03-30 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58168261A (enrdf_load_stackoverflow)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4456501A (en) * 1983-12-22 1984-06-26 Advanced Micro Devices, Inc. Process for dislocation-free slot isolations in device fabrication
US4468285A (en) * 1983-12-22 1984-08-28 Advanced Micro Devices, Inc. Plasma etch process for single-crystal silicon with improved selectivity to silicon dioxide
US4534826A (en) * 1983-12-29 1985-08-13 Ibm Corporation Trench etch process for dielectric isolation
JPS6123338A (ja) * 1984-07-11 1986-01-31 Sony Corp 半導体装置の製造方法
JPS62149153A (ja) * 1985-09-17 1987-07-03 Fujitsu Ltd 埋込型素子分離溝の構造とその形成方法
US4693781A (en) * 1986-06-26 1987-09-15 Motorola, Inc. Trench formation process
JPH0620108B2 (ja) * 1987-03-23 1994-03-16 三菱電機株式会社 半導体装置の製造方法
JPH0222818A (ja) * 1988-07-11 1990-01-25 Nec Corp 半導体装置の製造方法
JP2574672Y2 (ja) * 1990-12-14 1998-06-18 スズキ株式会社 コントロールケーブル取付構造
US6902867B2 (en) 2002-10-02 2005-06-07 Lexmark International, Inc. Ink jet printheads and methods therefor
US6984015B2 (en) 2003-08-12 2006-01-10 Lexmark International, Inc. Ink jet printheads and method therefor

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56103446A (en) * 1980-01-22 1981-08-18 Fujitsu Ltd Semiconductor device
JPS589333A (ja) * 1981-07-08 1983-01-19 Hitachi Ltd 半導体装置

Also Published As

Publication number Publication date
JPS58168261A (ja) 1983-10-04

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