JPH0516181B2 - - Google Patents

Info

Publication number
JPH0516181B2
JPH0516181B2 JP57081583A JP8158382A JPH0516181B2 JP H0516181 B2 JPH0516181 B2 JP H0516181B2 JP 57081583 A JP57081583 A JP 57081583A JP 8158382 A JP8158382 A JP 8158382A JP H0516181 B2 JPH0516181 B2 JP H0516181B2
Authority
JP
Japan
Prior art keywords
groove
film
dielectric material
filled
depth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57081583A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58199536A (ja
Inventor
Yoichi Tamaoki
Tokuo Kure
Takeo Shiba
Masao Kawamura
Akihisa Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8158382A priority Critical patent/JPS58199536A/ja
Publication of JPS58199536A publication Critical patent/JPS58199536A/ja
Publication of JPH0516181B2 publication Critical patent/JPH0516181B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/763Polycrystalline semiconductor regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
JP8158382A 1982-05-17 1982-05-17 半導体装置 Granted JPS58199536A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8158382A JPS58199536A (ja) 1982-05-17 1982-05-17 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8158382A JPS58199536A (ja) 1982-05-17 1982-05-17 半導体装置

Publications (2)

Publication Number Publication Date
JPS58199536A JPS58199536A (ja) 1983-11-19
JPH0516181B2 true JPH0516181B2 (enrdf_load_stackoverflow) 1993-03-03

Family

ID=13750337

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8158382A Granted JPS58199536A (ja) 1982-05-17 1982-05-17 半導体装置

Country Status (1)

Country Link
JP (1) JPS58199536A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07326664A (ja) * 1994-05-31 1995-12-12 Fuji Electric Co Ltd ウエハの誘電体分離溝の充填方法
JPH07326663A (ja) * 1994-05-31 1995-12-12 Fuji Electric Co Ltd ウエハの誘電体分離方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4238278A (en) * 1979-06-14 1980-12-09 International Business Machines Corporation Polycrystalline silicon oxidation method for making shallow and deep isolation trenches

Also Published As

Publication number Publication date
JPS58199536A (ja) 1983-11-19

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