JPS63108733A - 半導体集積回路 - Google Patents
半導体集積回路Info
- Publication number
- JPS63108733A JPS63108733A JP61254315A JP25431586A JPS63108733A JP S63108733 A JPS63108733 A JP S63108733A JP 61254315 A JP61254315 A JP 61254315A JP 25431586 A JP25431586 A JP 25431586A JP S63108733 A JPS63108733 A JP S63108733A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- buffer
- chip
- periphery
- circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/998—Input and output buffer/driver structures
-
- H10W72/07551—
-
- H10W72/50—
-
- H10W72/5445—
-
- H10W72/5449—
-
- H10W72/932—
-
- H10W72/9445—
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61254315A JPS63108733A (ja) | 1986-10-24 | 1986-10-24 | 半導体集積回路 |
| US07/113,831 US4947233A (en) | 1986-10-24 | 1987-10-26 | Semi-custom LSI having input/output cells |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61254315A JPS63108733A (ja) | 1986-10-24 | 1986-10-24 | 半導体集積回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63108733A true JPS63108733A (ja) | 1988-05-13 |
| JPH0519989B2 JPH0519989B2 (enExample) | 1993-03-18 |
Family
ID=17263289
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61254315A Granted JPS63108733A (ja) | 1986-10-24 | 1986-10-24 | 半導体集積回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4947233A (enExample) |
| JP (1) | JPS63108733A (enExample) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01293647A (ja) * | 1988-05-23 | 1989-11-27 | Fujitsu Ltd | 半導体装置 |
| WO2007015435A1 (ja) * | 2005-08-01 | 2007-02-08 | Matsushita Electric Industrial Co., Ltd. | 半導体装置 |
| US12357535B2 (en) | 2019-09-10 | 2025-07-15 | Emd Millipore Corporation | Articulating biocontainers |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5162893A (en) * | 1988-05-23 | 1992-11-10 | Fujitsu Limited | Semiconductor integrated circuit device with an enlarged internal logic circuit area |
| US5168342A (en) * | 1989-01-30 | 1992-12-01 | Hitachi, Ltd. | Semiconductor integrated circuit device and manufacturing method of the same |
| US4988636A (en) * | 1990-01-29 | 1991-01-29 | International Business Machines Corporation | Method of making bit stack compatible input/output circuits |
| US5093695A (en) * | 1990-05-18 | 1992-03-03 | At&T Bell Laboratories | Controllable semiconductor modulator having interleaved contacts |
| US5341018A (en) * | 1991-09-18 | 1994-08-23 | Nec Corporation | Semiconductor integrated circuit device having a plurality of input circuits each including differently sized transistors |
| JP3237304B2 (ja) * | 1993-05-31 | 2001-12-10 | 富士通株式会社 | 半導体集積回路 |
| US5691218A (en) * | 1993-07-01 | 1997-11-25 | Lsi Logic Corporation | Method of fabricating a programmable polysilicon gate array base cell structure |
| US5552333A (en) * | 1994-09-16 | 1996-09-03 | Lsi Logic Corporation | Method for designing low profile variable width input/output cells |
| US5760428A (en) * | 1996-01-25 | 1998-06-02 | Lsi Logic Corporation | Variable width low profile gate array input/output architecture |
| US5698873A (en) * | 1996-03-08 | 1997-12-16 | Lsi Logic Corporation | High density gate array base cell architecture |
| US6550047B1 (en) * | 2000-10-02 | 2003-04-15 | Artisan Components, Inc. | Semiconductor chip input/output cell design and automated generation methods |
| JP2002280453A (ja) * | 2001-03-19 | 2002-09-27 | Mitsubishi Electric Corp | 半導体集積回路 |
| TW530525B (en) * | 2001-07-27 | 2003-05-01 | Via Tech Inc | Method of disposing buffer and its chip |
| US7071561B2 (en) * | 2004-06-08 | 2006-07-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method of manufacture thereof with two or more bond pad connections for each input/output cell |
| US20070111376A1 (en) | 2005-04-29 | 2007-05-17 | Stats Chippac Ltd. | Integrated circuit package system |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57211248A (en) * | 1981-06-22 | 1982-12-25 | Hitachi Ltd | Semiconductor integrated circuit device |
| JPS5955045A (ja) * | 1982-09-24 | 1984-03-29 | Hitachi Ltd | 半導体集積回路装置 |
| JPS6027145A (ja) * | 1983-07-25 | 1985-02-12 | Hitachi Ltd | 半導体集積回路装置 |
-
1986
- 1986-10-24 JP JP61254315A patent/JPS63108733A/ja active Granted
-
1987
- 1987-10-26 US US07/113,831 patent/US4947233A/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01293647A (ja) * | 1988-05-23 | 1989-11-27 | Fujitsu Ltd | 半導体装置 |
| WO2007015435A1 (ja) * | 2005-08-01 | 2007-02-08 | Matsushita Electric Industrial Co., Ltd. | 半導体装置 |
| US7829983B2 (en) | 2005-08-01 | 2010-11-09 | Panasonic Corporation | Semiconductor device |
| US12357535B2 (en) | 2019-09-10 | 2025-07-15 | Emd Millipore Corporation | Articulating biocontainers |
Also Published As
| Publication number | Publication date |
|---|---|
| US4947233A (en) | 1990-08-07 |
| JPH0519989B2 (enExample) | 1993-03-18 |
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