JPS6246066B2 - - Google Patents

Info

Publication number
JPS6246066B2
JPS6246066B2 JP56164726A JP16472681A JPS6246066B2 JP S6246066 B2 JPS6246066 B2 JP S6246066B2 JP 56164726 A JP56164726 A JP 56164726A JP 16472681 A JP16472681 A JP 16472681A JP S6246066 B2 JPS6246066 B2 JP S6246066B2
Authority
JP
Japan
Prior art keywords
alloy
plating
wire
thickness
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56164726A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5882406A (ja
Inventor
Shoji Shiga
Satoshi Suzuki
Noryoshi Kiso
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP56164726A priority Critical patent/JPS5882406A/ja
Publication of JPS5882406A publication Critical patent/JPS5882406A/ja
Publication of JPS6246066B2 publication Critical patent/JPS6246066B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/4557Plural coating layers
    • H01L2224/45572Two-layer stack coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Insulated Conductors (AREA)
JP56164726A 1981-10-15 1981-10-15 銀又は銀合金被覆ダイオ−ドリ−ド線とその製造方法 Granted JPS5882406A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56164726A JPS5882406A (ja) 1981-10-15 1981-10-15 銀又は銀合金被覆ダイオ−ドリ−ド線とその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56164726A JPS5882406A (ja) 1981-10-15 1981-10-15 銀又は銀合金被覆ダイオ−ドリ−ド線とその製造方法

Publications (2)

Publication Number Publication Date
JPS5882406A JPS5882406A (ja) 1983-05-18
JPS6246066B2 true JPS6246066B2 (enrdf_load_stackoverflow) 1987-09-30

Family

ID=15798724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56164726A Granted JPS5882406A (ja) 1981-10-15 1981-10-15 銀又は銀合金被覆ダイオ−ドリ−ド線とその製造方法

Country Status (1)

Country Link
JP (1) JPS5882406A (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59228311A (ja) * 1983-06-08 1984-12-21 古河電気工業株式会社 Ag被覆電気材料とその製造方法
JPS63150950A (ja) * 1986-12-15 1988-06-23 Shinko Electric Ind Co Ltd 電子部品用パツケ−ジ
DE68923024T2 (de) * 1988-03-28 1995-11-02 Texas Instruments Inc Leiterrahmen mit verminderter Korrosion.
JP5275504B1 (ja) * 2012-06-15 2013-08-28 Jx日鉱日石金属株式会社 電子部品用金属材料及びその製造方法、それを用いたコネクタ端子、コネクタ及び電子部品

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5949651B2 (ja) * 1977-02-08 1984-12-04 日立電線株式会社 耐熱性配線用電気導体
JPS6034477B2 (ja) * 1977-08-17 1985-08-08 大日本印刷株式会社 転写方法
JPS5472483A (en) * 1977-11-21 1979-06-09 Hitachi Cable Ltd Manufacture of heat-resistant wiring conductor

Also Published As

Publication number Publication date
JPS5882406A (ja) 1983-05-18

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