JPS6242382B2 - - Google Patents

Info

Publication number
JPS6242382B2
JPS6242382B2 JP57137705A JP13770582A JPS6242382B2 JP S6242382 B2 JPS6242382 B2 JP S6242382B2 JP 57137705 A JP57137705 A JP 57137705A JP 13770582 A JP13770582 A JP 13770582A JP S6242382 B2 JPS6242382 B2 JP S6242382B2
Authority
JP
Japan
Prior art keywords
film
sio
oxide film
silicon oxide
element isolation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57137705A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5927543A (ja
Inventor
Moryoshi Nakajima
Akira Ando
Hirokazu Myoshi
Akira Nishimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP57137705A priority Critical patent/JPS5927543A/ja
Publication of JPS5927543A publication Critical patent/JPS5927543A/ja
Publication of JPS6242382B2 publication Critical patent/JPS6242382B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W10/0128—
    • H10W10/13—

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
JP57137705A 1982-08-06 1982-08-06 半導体装置の製造方法 Granted JPS5927543A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57137705A JPS5927543A (ja) 1982-08-06 1982-08-06 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57137705A JPS5927543A (ja) 1982-08-06 1982-08-06 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5927543A JPS5927543A (ja) 1984-02-14
JPS6242382B2 true JPS6242382B2 (cg-RX-API-DMAC10.html) 1987-09-08

Family

ID=15204888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57137705A Granted JPS5927543A (ja) 1982-08-06 1982-08-06 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5927543A (cg-RX-API-DMAC10.html)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1213218B (it) * 1984-09-25 1989-12-14 Ates Componenti Elettron Processo per la fabbricazione di una cella di memoria non volatile con area di ossido sottile di dimensioni molto piccole, e cella ottenuta con il processo suddetto.
JPH0821681B2 (ja) * 1986-06-18 1996-03-04 株式会社日立製作所 半導体集積回路装置の製造方法
US4758530A (en) * 1986-12-08 1988-07-19 Delco Electronics Corporation Doubly-self-aligned hole-within-a-hole structure in semiconductor fabrication involving a double LOCOS process aligned with sidewall spacers
JPH0172728U (cg-RX-API-DMAC10.html) * 1987-11-04 1989-05-16
JPH01143352A (ja) * 1987-11-30 1989-06-05 Nec Kyushu Ltd 溝容量部を備えた半導体記憶装置
JP2512216B2 (ja) * 1989-08-01 1996-07-03 松下電器産業株式会社 半導体装置の製造方法
US5448090A (en) * 1994-08-03 1995-09-05 International Business Machines Corporation Structure for reducing parasitic leakage in a memory array with merged isolation and node trench construction
US5679600A (en) * 1995-10-11 1997-10-21 Micron Technology, Inc. Double locos for submicron isolation

Also Published As

Publication number Publication date
JPS5927543A (ja) 1984-02-14

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