JPS62291127A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS62291127A
JPS62291127A JP61136618A JP13661886A JPS62291127A JP S62291127 A JPS62291127 A JP S62291127A JP 61136618 A JP61136618 A JP 61136618A JP 13661886 A JP13661886 A JP 13661886A JP S62291127 A JPS62291127 A JP S62291127A
Authority
JP
Japan
Prior art keywords
metal
film
bonding
cover film
ball
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61136618A
Other languages
English (en)
Inventor
Kou Noguchi
江 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61136618A priority Critical patent/JPS62291127A/ja
Publication of JPS62291127A publication Critical patent/JPS62291127A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165—Reinforcing structures
    • H01L2224/02166—Collar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/0347—Manufacturing methods using a lift-off mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4807—Shape of bonding interfaces, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4845—Details of ball bonds
    • H01L2224/48451—Shape
    • H01L2224/48453—Shape of the interface with the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 ３、発明の詳細な説明 〔産業上の利用分野〕 本発明は、ポールボンディングを用いて外部に配線を取
り出す電極構造を有する半導体装置に関する。
し従来の技術〕 従来、半導体素子（チップ）の電極部の構造は、第２図
の断面図に示すようになっている。すなわち、第２図に
おいて、半導体基板ｌ上に層間絶縁膜２を介して設けら
れた金属配線３の上に、電極部に開孔全般けたカバー膜
４を形成する。この時、開孔部の面積は、ボンディング
に使用するボールの中心断面より大きい。次にボンディ
ングにより金属（アルミ）配ｌ１Ｆｉ１３とボンディン
グワイヤ８のボール８ａとを圧着させて、素子の外部に
配線を取り出す。
〔発明が解決しようとする問題点〕
上述した従来のｔ極配線の取出しでは、カバー膜の開孔
部において、金属配線上で、ボンティングボールの接し
ていない部分が、直接外部の雰囲気に触れるため、外部
からの水蒸気不純物イオン等の侵入に対し無防備であり
、金属電極の腐蝕など、素子の耐温性が弱いという欠点
がある。
〔問題点を解決するための手段〕
本発明の電極部構造は、−ｈ記の欠点を解決するために
、カバー膜に開けた電極開孔部の電極表面における最大
直径が、ポールボンディング稜のボールと下地との接触
面の直径よｐも小さく、かつ、カバー膜の開孔部に、カ
バー膜の膜厚を越えない厚さの金属を形成し、かつカバ
ー膜の開孔部に露出した金属電極すべてをボンティング
のボールでおおう如く構成されている。
〔実施例〕
次に本発明について図面を参照して説明する。
第１図（ａ）〜（ｃｌは本発明の一実施例に係る半導体
チップの電極部を、製造工程でもって説明するだめの断
面図である。まず第１図（ａＪに示すように、半導体基
板１上に層間絶縁膜２を介して金属配線３を形成した稜
に、カバー膜４を形成する。次にフォトリソグラフィ法
により、配線取出口部分のレジスト５を除去し、カバー
膜を等方性エツチング、および異方性エツチングを行う
ことによりテーバーを持った孔をカバー膜４に形成する
。次いで第１図（ｂｌに示すように、金属６を蒸着また
はスパッタリングで全面に被着する。つぎに第１図（Ｃ
）に示すように、リフトオフ法により、開孔部にのみ金
属６ａｋ形成する。この時、金ＪＦｆ４６　ａの金属配
線３上における膜厚が、カバー膜４の膜厚よシも薄くな
るようにする。それからボールボンティングを行い、カ
バー膜４の開孔部に露出した金属電極ヲボンティングの
ボール８ａでおおうことにより、本発明の電極部構造が
実現できる。
〔発明の効果〕
以上説明したように本発明は、カバー膜の開孔部におけ
る金属ｔ＆ヲ、ボンティングのボールでおおう事により
、金属電極は外部の雰囲気に直接さらされず、外部から
の水蒸気、不純物イオン等の浸入を防ぐことができるた
め、耐湿性を向上させる効果がある。
【図面の簡単な説明】
第１図（ａ）〜ｔｃ）は本発明の一実施例に係る半導体
装置の電極部を、製造工程でもって説明するための断面
図、第２図は従来の半導体装置の電極部の断面図である
。 １・半導体基板、２・・・層間絶縁膜、３・・金属配線
、４・・カバー膜、５・・フオトレジスＨ［，６゜６ａ
・・開孔部の埋設金属、８−ボンティングワイヤ、８ａ
・・・ワイヤのボール。

Claims (1)

    【特許請求の範囲】
  1. 半導体基板上の金属配線を覆うカバー膜に開けられた開
    孔部からボールボンディングにより前記金属配線を外部
    に取り出した電極構造を有する半導体装置において、前
    記開孔部を埋めるように前記開孔部の金属配線の上に前
    記カバー膜の膜厚を越えない厚さの金属層が形成され、
    さらに、この金属層上に、前記ボールが前記開孔部を完
    全に覆うようにボンディングされていることを特徴とす
    る半導体装置。
JP61136618A 1986-06-11 1986-06-11 半導体装置 Pending JPS62291127A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61136618A JPS62291127A (ja) 1986-06-11 1986-06-11 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61136618A JPS62291127A (ja) 1986-06-11 1986-06-11 半導体装置

Publications (1)

Publication Number Publication Date
JPS62291127A true JPS62291127A (ja) 1987-12-17

Family

ID=15179512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61136618A Pending JPS62291127A (ja) 1986-06-11 1986-06-11 半導体装置

Country Status (1)

Country Link
JP (1) JPS62291127A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5891745A (en) * 1994-10-28 1999-04-06 Honeywell Inc. Test and tear-away bond pad design

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5891745A (en) * 1994-10-28 1999-04-06 Honeywell Inc. Test and tear-away bond pad design

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