JPS6219072B2 - - Google Patents

Info

Publication number
JPS6219072B2
JPS6219072B2 JP17078381A JP17078381A JPS6219072B2 JP S6219072 B2 JPS6219072 B2 JP S6219072B2 JP 17078381 A JP17078381 A JP 17078381A JP 17078381 A JP17078381 A JP 17078381A JP S6219072 B2 JPS6219072 B2 JP S6219072B2
Authority
JP
Japan
Prior art keywords
ceramic substrate
chip
wiring
insulating layer
chips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP17078381A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5873142A (ja
Inventor
Toshihiko Watari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP17078381A priority Critical patent/JPS5873142A/ja
Publication of JPS5873142A publication Critical patent/JPS5873142A/ja
Publication of JPS6219072B2 publication Critical patent/JPS6219072B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
JP17078381A 1981-10-27 1981-10-27 マルチチツプｌｓｉパツケ−ジ Granted JPS5873142A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17078381A JPS5873142A (ja) 1981-10-27 1981-10-27 マルチチツプｌｓｉパツケ−ジ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17078381A JPS5873142A (ja) 1981-10-27 1981-10-27 マルチチツプｌｓｉパツケ−ジ

Publications (2)

Publication Number Publication Date
JPS5873142A JPS5873142A (ja) 1983-05-02
JPS6219072B2 true JPS6219072B2 (ko) 1987-04-25

Family

ID=15911281

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17078381A Granted JPS5873142A (ja) 1981-10-27 1981-10-27 マルチチツプｌｓｉパツケ−ジ

Country Status (1)

Country Link
JP (1) JPS5873142A (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63198565A (ja) * 1987-02-12 1988-08-17 Sony Corp 偏平ブラシレスモ−タ及びその製造方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6061791U (ja) * 1983-09-30 1985-04-30 日本メクトロン株式会社 高密度パタ−ンの冷却装置
JPS60187098A (ja) * 1984-03-07 1985-09-24 イビデン株式会社 プラグインパツケ−ジ基板
US4771366A (en) * 1987-07-06 1988-09-13 International Business Machines Corporation Ceramic card assembly having enhanced power distribution and cooling

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63198565A (ja) * 1987-02-12 1988-08-17 Sony Corp 偏平ブラシレスモ−タ及びその製造方法

Also Published As

Publication number Publication date
JPS5873142A (ja) 1983-05-02

Similar Documents

Publication Publication Date Title
US6326696B1 (en) Electronic package with interconnected chips
US5471366A (en) Multi-chip module having an improved heat dissipation efficiency
JP2894071B2 (ja) 半導体装置
JP2910670B2 (ja) 半導体実装構造
JPH07263625A (ja) 誘電体テープから形成されたディスクリートなチップキャリアを有する垂直なｉｃチップ積層体
JPH0758276A (ja) マルチチップ・モジュール
JPH0917919A (ja) 半導体装置
JP3016910B2 (ja) 半導体モジュール構造
JP2004031650A (ja) リードレスパッケージおよび半導体装置
JP3312611B2 (ja) フィルムキャリア型半導体装置
JPS6219072B2 (ko)
JP3450477B2 (ja) 半導体装置及びその製造方法
JPH04290258A (ja) マルチチップモジュール
US6137174A (en) Hybrid ASIC/memory module package
JPH06204355A (ja) 半導体装置用パッケージ及び半導体装置
JP3024596B2 (ja) フィルムキャリアテープを用いたｂｇａ型半導体装置
JPH08130288A (ja) 半導体装置
JP3093278B2 (ja) 向上したパッド設計による電子パッケージ
JPH06112355A (ja) セラミックパッケージ
JPS5853854A (ja) 高密度ｌｓｉパツケ−ジ
JPH10256413A (ja) 半導体パッケージ
JPS6151427B2 (ko)
JP2000323627A (ja) フィルムキャリア型半導体装置
JPS5986293A (ja) 多層配線基板
JPH05267561A (ja) 高速処理用電子部品搭載用基板