JPS6051318A - Ｃｍｏｓシユミツト回路 - Google Patents
Ｃｍｏｓシユミツト回路Info
- Publication number
- JPS6051318A JPS6051318A JP58159248A JP15924883A JPS6051318A JP S6051318 A JPS6051318 A JP S6051318A JP 58159248 A JP58159248 A JP 58159248A JP 15924883 A JP15924883 A JP 15924883A JP S6051318 A JPS6051318 A JP S6051318A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- transistor
- potential
- vcc
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 101150113941 trt1 gene Proteins 0.000 abstract 2
- 101100538446 Aspergillus terreus (strain NIH 2624 / FGSC A1156) trt2 gene Proteins 0.000 abstract 1
- 238000006243 chemical reaction Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000000295 complement effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
- H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
- H03K19/09482—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors using a combination of enhancement and depletion transistors
- H03K19/09485—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors using a combination of enhancement and depletion transistors with active depletion transistors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58159248A JPS6051318A (ja) | 1983-08-31 | 1983-08-31 | Ｃｍｏｓシユミツト回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58159248A JPS6051318A (ja) | 1983-08-31 | 1983-08-31 | Ｃｍｏｓシユミツト回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6051318A true JPS6051318A (ja) | 1985-03-22 |
| JPH028486B2 JPH028486B2 (enrdf_load_stackoverflow) | 1990-02-26 |
Family
ID=15689589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58159248A Granted JPS6051318A (ja) | 1983-08-31 | 1983-08-31 | Ｃｍｏｓシユミツト回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6051318A (enrdf_load_stackoverflow) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100711108B1 (ko) | 2004-07-16 | 2007-04-24 | 삼성전자주식회사 | 레벨 쉬프터 및 레벨 쉬프팅 방법 |
-
1983
- 1983-08-31 JP JP58159248A patent/JPS6051318A/ja active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100711108B1 (ko) | 2004-07-16 | 2007-04-24 | 삼성전자주식회사 | 레벨 쉬프터 및 레벨 쉬프팅 방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH028486B2 (enrdf_load_stackoverflow) | 1990-02-26 |
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