JPS60500433A - 基板バイアス制御回路および方法 - Google Patents

基板バイアス制御回路および方法

Info

Publication number
JPS60500433A
JPS60500433A JP59500432A JP50043284A JPS60500433A JP S60500433 A JPS60500433 A JP S60500433A JP 59500432 A JP59500432 A JP 59500432A JP 50043284 A JP50043284 A JP 50043284A JP S60500433 A JPS60500433 A JP S60500433A
Authority
JP
Japan
Prior art keywords
substrate
bias voltage
voltage
supply voltage
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59500432A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0439784B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
ハンテイントン，ロバート　シー
Original Assignee
モトロ−ラ・インコ−ポレ−テツド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by モトロ−ラ・インコ−ポレ−テツド filed Critical モトロ−ラ・インコ−ポレ−テツド
Publication of JPS60500433A publication Critical patent/JPS60500433A/ja
Publication of JPH0439784B2 publication Critical patent/JPH0439784B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
JP59500432A 1983-02-07 1983-12-15 基板バイアス制御回路および方法 Granted JPS60500433A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US464163 1983-02-07
US06/464,163 US4473758A (en) 1983-02-07 1983-02-07 Substrate bias control circuit and method

Publications (2)

Publication Number Publication Date
JPS60500433A true JPS60500433A (ja) 1985-03-28
JPH0439784B2 JPH0439784B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-06-30

Family

ID=23842803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59500432A Granted JPS60500433A (ja) 1983-02-07 1983-12-15 基板バイアス制御回路および方法

Country Status (7)

Country Link
US (1) US4473758A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0135504B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS60500433A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR840008097A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
CA (1) CA1197574A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3381162D1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
WO (1) WO1984003185A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6248061A (ja) * 1985-08-26 1987-03-02 シ−メンス、アクチエンゲゼルシヤフト 相補性回路技術による集積回路

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4571505A (en) * 1983-11-16 1986-02-18 Inmos Corporation Method and apparatus of reducing latch-up susceptibility in CMOS integrated circuits
US4556804A (en) * 1983-11-17 1985-12-03 Motorola, Inc. Power multiplexer switch and method
US4631421A (en) * 1984-08-14 1986-12-23 Texas Instruments CMOS substrate bias generator
US4686388A (en) * 1985-03-12 1987-08-11 Pitney Bowes Inc. Integrated circuit substrate bias selection circuit
GB2174540B (en) * 1985-05-02 1989-02-15 Texas Instruments Ltd Intergrated circuits
US4670668A (en) * 1985-05-09 1987-06-02 Advanced Micro Devices, Inc. Substrate bias generator with power supply control means to sequence application of bias and power to prevent CMOS SCR latch-up
US4661979A (en) * 1985-09-24 1987-04-28 Northern Telecom Limited Fault protection for integrated subscriber line interface circuits
US4791317A (en) * 1986-09-26 1988-12-13 Siemens Aktiengesellschaft Latch-up protection circuit for integrated circuits using complementary mos circuit technology
US4791316A (en) * 1986-09-26 1988-12-13 Siemens Aktiengesellschaft Latch-up protection circuit for integrated circuits using complementary MOS circuit technology
US5272393A (en) * 1987-11-24 1993-12-21 Hitachi, Ltd. Voltage converter of semiconductor device
JPH0783254B2 (ja) * 1989-03-22 1995-09-06 株式会社東芝 半導体集積回路
US5162675A (en) * 1989-04-14 1992-11-10 Digital Communications Associates, Inc. Dual personal computer architecture peripheral adapter board and circuit
DE69127359T2 (de) * 1991-06-27 1998-03-19 Cons Ric Microelettronica Schaltkreis zum Verbinden eines ersten Knotens mit einem zweiten oder dritten Knoten in Abhängigkeit vom Potential des letzteren, zum Steuern des Potentials eines Isolationsbereiches in einer integrierten Schaltung in Abhängigkeit der Substratspannung
US5313111A (en) * 1992-02-28 1994-05-17 Texas Instruments Incorporated Substrate slew circuit providing reduced electron injection
ATE139875T1 (de) * 1992-09-16 1996-07-15 Siemens Ag Cmos-pufferschaltung
JP2978346B2 (ja) * 1992-11-30 1999-11-15 三菱電機株式会社 半導体集積回路装置の入力回路
JPH0778481A (ja) * 1993-04-30 1995-03-20 Sgs Thomson Microelectron Inc ダイレクトカレント和バンドギャップ電圧比較器
US5406140A (en) * 1993-06-07 1995-04-11 National Semiconductor Corporation Voltage translation and overvoltage protection
US5694075A (en) * 1994-12-30 1997-12-02 Maxim Integrated Products Substrate clamp for non-isolated integrated circuits
JP3533306B2 (ja) * 1996-04-02 2004-05-31 株式会社東芝 半導体集積回路装置
US6198339B1 (en) * 1996-09-17 2001-03-06 International Business Machines Corporation CVF current reference with standby mode
US5767733A (en) * 1996-09-20 1998-06-16 Integrated Device Technology, Inc. Biasing circuit for reducing body effect in a bi-directional field effect transistor
US5883544A (en) * 1996-12-03 1999-03-16 Stmicroelectronics, Inc. Integrated circuit actively biasing the threshold voltage of transistors and related methods
US6163044A (en) 1998-02-18 2000-12-19 Micron Technology, Inc. Method and circuit for lowering standby current in an integrated circuit
AU2002235347A1 (en) * 2001-01-09 2002-07-24 Broadcom Corporation Sub-micron high input voltage tolerant input output (i/o) circuit
US6859074B2 (en) * 2001-01-09 2005-02-22 Broadcom Corporation I/O circuit using low voltage transistors which can tolerate high voltages even when power supplies are powered off
SE520306C2 (sv) * 2001-01-31 2003-06-24 Ericsson Telefon Ab L M Regulator för en halvledarkrets
US7138836B2 (en) * 2001-12-03 2006-11-21 Broadcom Corporation Hot carrier injection suppression circuit
KR100428792B1 (ko) * 2002-04-30 2004-04-28 삼성전자주식회사 패드의 언더슈트 또는 오버슈트되는 입력 전압에 안정적인전압 측정장치
US20110102046A1 (en) * 2009-10-31 2011-05-05 Pankaj Kumar Interfacing between differing voltage level requirements in an integrated circuit system
US8130030B2 (en) * 2009-10-31 2012-03-06 Lsi Corporation Interfacing between differing voltage level requirements in an integrated circuit system
KR101521145B1 (ko) * 2010-10-01 2015-05-18 쥬오세이키 가부시키가이샤 차량용 휠 및 차량용 휠의 제조 방법

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4044373A (en) * 1967-11-13 1977-08-23 Hitachi, Ltd. IGFET with gate protection diode and antiparasitic isolation means
US3947727A (en) * 1974-12-10 1976-03-30 Rca Corporation Protection circuit for insulated-gate field-effect transistors
US4049980A (en) * 1976-04-26 1977-09-20 Hewlett-Packard Company IGFET threshold voltage compensator
US4066918A (en) * 1976-09-30 1978-01-03 Rca Corporation Protection circuitry for insulated-gate field-effect transistor (IGFET) circuits
US4260909A (en) * 1978-08-30 1981-04-07 Bell Telephone Laboratories, Incorporated Back gate bias voltage generator circuit
US4264941A (en) * 1979-02-14 1981-04-28 National Semiconductor Corporation Protective circuit for insulated gate field effect transistor integrated circuits
JPS59121971A (ja) * 1982-12-23 1984-07-14 モトロ−ラ・インコ−ポレ−テツド 基準化ｃｍｏｓデバイス用入力保護回路およびバイアス方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6248061A (ja) * 1985-08-26 1987-03-02 シ−メンス、アクチエンゲゼルシヤフト 相補性回路技術による集積回路

Also Published As

Publication number Publication date
EP0135504A4 (en) 1986-09-24
EP0135504B1 (en) 1990-01-24
JPH0439784B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-06-30
WO1984003185A1 (en) 1984-08-16
EP0135504A1 (en) 1985-04-03
CA1197574A (en) 1985-12-03
US4473758A (en) 1984-09-25
DE3381162D1 (de) 1990-03-01
KR840008097A (ko) 1984-12-12

Similar Documents

Publication Publication Date Title
JPS60500433A (ja) 基板バイアス制御回路および方法
KR960003374B1 (ko) 반도체 집적 회로 장치
KR940001251B1 (ko) 전압 제어회로
US5057715A (en) CMOS output circuit using a low threshold device
US5574389A (en) CMOS 3.3 volt output buffer with 5 volt protection
US6040729A (en) Digital output buffer for multiple voltage system
KR19990067849A (ko) 허용 전압 출력 버퍼
US6741098B2 (en) High speed semiconductor circuit having low power consumption
JPH02268512A (ja) 誘導負荷を有する電力用ｍｏｓトランジスタを制御する回路
US5966035A (en) High voltage tolerable input buffer
JP2000138578A (ja) 耐高電圧および伸展性ドライバ回路
US5886543A (en) Power semiconductor switch having a load open-circuit detection circuit
KR100357279B1 (ko) 풀업회로및반도체장치
KR100334365B1 (ko) 시모스 입력 버퍼 보호 회로
JPH07106455A (ja) 半導体集積回路装置の静電破壊保護回路
US6476641B2 (en) Low power consuming circuit
JPH1032481A (ja) 論理回路
JPH06325569A (ja) 半導体集積回路の中間電圧発生回路
KR100391991B1 (ko) 전압 인터페이스 회로를 구비한 반도체 집적 회로 장치
KR970013312A (ko) 반도체 집적회로
JP2798602B2 (ja) 出力インタフェース回路
JP3190169B2 (ja) 半導体集積回路
JP2002231886A (ja) Ｅｓｄ保護回路および半導体集積回路装置
JPH06291638A (ja) 半導体装置
US20030030424A1 (en) Supply voltage reference circuit