JPS6049466A - 多重系計算機システムのバス切替装置 - Google Patents

多重系計算機システムのバス切替装置

Info

Publication number
JPS6049466A
JPS6049466A JP58157082A JP15708283A JPS6049466A JP S6049466 A JPS6049466 A JP S6049466A JP 58157082 A JP58157082 A JP 58157082A JP 15708283 A JP15708283 A JP 15708283A JP S6049466 A JPS6049466 A JP S6049466A
Authority
JP
Japan
Prior art keywords
bus
connection
cpu
connection state
path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58157082A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0420218B2 (ko
Inventor
Toshiaki Sato
利明 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Fuji Facom Corp
Original Assignee
Fuji Electric Co Ltd
Fuji Facom Corp
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Facom Corp, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP58157082A priority Critical patent/JPS6049466A/ja
Publication of JPS6049466A publication Critical patent/JPS6049466A/ja
Publication of JPH0420218B2 publication Critical patent/JPH0420218B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
JP58157082A 1983-08-30 1983-08-30 多重系計算機システムのバス切替装置 Granted JPS6049466A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58157082A JPS6049466A (ja) 1983-08-30 1983-08-30 多重系計算機システムのバス切替装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58157082A JPS6049466A (ja) 1983-08-30 1983-08-30 多重系計算機システムのバス切替装置

Publications (2)

Publication Number Publication Date
JPS6049466A true JPS6049466A (ja) 1985-03-18
JPH0420218B2 JPH0420218B2 (ko) 1992-04-02

Family

ID=15641852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58157082A Granted JPS6049466A (ja) 1983-08-30 1983-08-30 多重系計算機システムのバス切替装置

Country Status (1)

Country Link
JP (1) JPS6049466A (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05204567A (ja) * 1992-07-27 1993-08-13 Canon Inc 機能切換装置及び方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05204567A (ja) * 1992-07-27 1993-08-13 Canon Inc 機能切換装置及び方法

Also Published As

Publication number Publication date
JPH0420218B2 (ko) 1992-04-02

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