JPS6035525A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6035525A
JPS6035525A JP58143823A JP14382383A JPS6035525A JP S6035525 A JPS6035525 A JP S6035525A JP 58143823 A JP58143823 A JP 58143823A JP 14382383 A JP14382383 A JP 14382383A JP S6035525 A JPS6035525 A JP S6035525A
Authority
JP
Japan
Prior art keywords
film
insulating film
bonding pad
layer
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58143823A
Other languages
English (en)
Inventor
Hidekazu Takahashi
英一 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP58143823A priority Critical patent/JPS6035525A/ja
Publication of JPS6035525A publication Critical patent/JPS6035525A/ja
Pending legal-status Critical Current

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体装置におけるボンディング部構造に関し
、特に超音波電気振動ワイヤボンティング利用によるポ
ンディングパッドを有する半導体装置を対象とする。
〔背景技術〕
ＩＣ，ＬＳＩ等の半導体装置において、半導体素子の形
成された半導体基体の周辺部には素子から接続されたア
ルミニウム配線の外端部がワイヤボンディングのだめの
ポンディングパッドとしてアルミニウム膜を２層に重ね
てＪν、く形成さねている。
第１図にこれまでの半導体装置におけるポンディングパ
ッド部の平面形状が示され、第２図に第１図におけるＡ
−Ａ’切断面状が示される。
同図において、１けシリコン半導体ノー；体、２は基体
表面酸化膜（Ｓｊ０２膜）、３はボンティングパッド下
ＩｗＩｍであって第１層アルミニウム配線４の終端部と
して基体周辺部に形成される。５け第１＃アルミニウム
配線の上に被せて形成１２．たポリイミド系樹脂等から
なる層間（第］　／＃及び第２ＪＩ４アルミニウム配線
間）絶縁膜でこの層間絶縁膜４はパッド下地の下層膜３
を完全に押えこんで固定するだめに少なくともパッド部
周囲からの距離二１、＝４０μｍ程度重ね合せるように
している。
６は第２層アルミニウムからなるポンディングパッド上
層膜で層間絶縁膜５にあけたスルーホール（透孔）部９
を通Ｌ２て下層膜３に一体に接続される。７は第２層ア
ルミニウムの一部に重なるように形成されたポリイミド
系樹脂等からなる保護用絶縁膜である。８は金ワイヤで
ポンディングパッドの上面圧ワイヤボンディングにより
接続され、他端は外部の対応リード（図示せず）Ｋワイ
ヤボンディングにより接続されることになる。
このように、これ寸での構造では２漸のアルミニウム３
，６を用いたポンディングパッド部の周辺部を抑えるよ
うに固定するためにポリイミド層の２層の有機絶縁膜が
用いられている。有機絶縁膜は厚く形成することで最終
表面を平担化できる長所をもっている反面、吸湿性があ
り、保護性に問題がある。そこで、有機絶縁膜に代えて
、耐湿性のよいリンシリケートガラス（ＰＳＧ）等の無
機絶縁膜を用いることが本出願人によって提案された。
しかし、第１図、第２図で示した構造で単に有機絶縁膜
を無機絶縁膜に変えた場合には、ポンディングパッドの
アルミニウムに比し７て無機絶縁膜は、硬さが著しくか
たく、緩衝性が無いため、超音波電気振動によるワイヤ
ボンディングを行うトキ、同図に×印で示すようにワイ
ヤボンディング個所の近傍で層間絶縁膜４がクラックを
１うす。
このクラックから水分が浸透しやすく、その結果、アル
ミニウムが腐食して断線不良が発生するという問題点が
生ずるということが本出願人によってあきらかとされた
。
〔発明の目的〕
本発明は上述ｊまた問題を解決したものであり、その目
的とするところは、超音波電気振動ボンディングによっ
て無機絶縁膜が損傷されることのないポンディングパッ
ド部構造を有する半導体装置の提供にある。
〔発明の概要〕
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、下記のとおりである。
すなわち、半導体基体内に半導体素子が形成され、上記
半導体素子に接続する配線の一部が２層の金属膜からな
るポンディングパッド部として形成され、この２Ｎａの
金属膜のうち下層の金属膜上の一部に重なる無機性の第
１の絶縁膜が形成され、上記２ＩＶ！の金属膜のうち上
層の金属膜の周辺部上に重なる第２の絶縁膜が形成され
た半導体装置であって、少なくとも第１層の絶縁膜はポ
ンディングパッド部から外れた周縁部で下層の金属膜上
に正なるように形成されていることにより、ボンディン
グの振動による絶縁膜のクラックの発生を防止し、前記
目的が達成できる。
〔実施例〕
第３図、第４図ｄ本発明の一実施例を示すものであって
、このうち第３図はポンディングパッド部の平面図、第
４図は第３図におけるＢ−Ｂ’切断断面図である。
同図において、１はシリコン半導体基体、２は表面酸化
膜、３は第１層アルミニウムからなるポンディングパッ
ド下層膜であって、ポンディングパッド部いっばいに（
たとえば１辺の寸法　ａ＝１３０μｍ　）形成される。
１０は厚さ７μｍのリン・シリケートガラス（ＰＳＧ　
）等から在る層間絶縁膜で、ポンディングパッド下層膜
３の周縁部上に重ねられている。
６は第２層アルミニウムからなるポンディングパッド上
層膜で、層間絶縁膜１０の広く開けられたスルーホール
１１を通して下層膜３に一体的に接続される。１２は保
護用絶縁膜で、厚さ１μｍ程度の無機絶縁膜たとえばＰ
ＳＧ膜であって、層間絶縁膜１０及び図示されｈ゛い第
２層アルミニウム配線の上を覆い、ポンディングパッド
上層膜６の周辺部で１２−５μｍ　程度の幅で重ねられ
でいる。８は上層膜６上に超音波電気振動ボンディング
によって設けた金ワイヤである。
第５図は本発明の一実施例であって、半導体素子及び配
線を含めた半導体装置の一部を示す断面図である。
同図において、１３は半導体素子の一部たとえばベース
領域、１４はこのベース領域表面にオーミック接続する
第１層アルミニウム配線で、その末端部はポンディング
パッド下層となっている。
１０は層間絶縁Ｂか、１５は層間絶縁膜上に設けられた
第２層アルミニウム配線である。ポンディングパッド上
層膜６は上記第２層アルミニウム配線１５と同時に形成
される。ポンディングパッド部分の構造は前掲第４図の
場合ど同一である。
〔効果〕
以」一実施例で述べた本発明によれば少なくとも、ポン
ディングパッド部下層の金属層３ボンディングバンド部
から離れた周縁部で層間膜である無機絶縁膜を重ねるこ
とにより、ポンディングパッド部への超音波電気振動ワ
イヤボンディングを行った際に、その微振動が層間絶縁
膜に到達しにくくなる。この場合、無機絶縁膜自体が硬
く機械的強度が大きいことから、わずか５μｍ程度重ね
るだけでポンディングパッドを抑え込んで固定すること
ができ、アルミニウム膜がずれることなく層間膜、保護
膜としての役割を持たせることができる。
したがって、本発明により層間膜にクラック等が発生し
に〈〈なり、クラックによる耐湿性が向上するとともに
、超音波電気振動ボンディングによるボンダビリティが
向上し、半導体装置の信頼性が向上するという効果が得
られる。
以上本発明者によってなされた発明を実施例にもとづき
具体的に説明したが、本発明は上ハト１実施例に限定さ
れるものではなく、その要旨を逸脱（〜ない範囲で種々
変更可能であることはいう捷でもない。たとえば、層間
膜、保護膜に使用する無機絶縁膜はＰＳＧ以外にＣＶＤ
（気相化学堆積）によるシリコン酸化膜（Ｓｉｎ、、１
ｉｄ）、シリコン窒化膜（Ｓｌ、Ｎ、膜）、あるいけＳ
ｔ、Ｎ４膜とＳｉｎ。
膜の多層膜を使用することができる。
〔利用分野〕
本発明は少なくともボンディング部近傍に無機絶縁膜を
有する半導体装置の全てに適用することができる。
本発明は局間膜と保眼膜等２層の無機絶縁膜を有する半
導体装置で、たとえばセラミックパッケージ封止形の製
品に適用して特に有効である。
本発明はまた、層間膜に無機絶縁膜を有し、上層の保護
膜に有機絶！Ｖ膜を有する半導体装置に応用する場合に
も同様の効果をもちうる。
【図面の簡単な説明】
第二図及び第２図は半導体装置、のポンディングパッド
部分の構造を示す例であって、第１図は平面図、第２図
は第１図におけるＡ−Ａ’断面図である。 第３図及び第４図は本発明による一実施例を示し、第３
図はポンディングパッド部分の平面図、第４図は第３図
におけるＢ−Ｂ’断面図である。 第５図は本発明による一実施例であって、ポンディング
パッド部及び素子の一部を含む半導体装置の断面図であ
る。 １：シリコン半導体基体、２：酸化膜、３：ポンディン
グパッド下層膜（アルミニウム）、４：第１層アルミニ
ウム配線、５：層間絶縁膜（ポリイミド膜）、６：ポン
ディングパッド上層膜（アルミニウム）、７：保穫絶縁
膜（ポリイミド膜）、８：金ワイヤ、９ニスルーホール
、１０：層間絶縁膜（ＰＳＧ）、１１ニスルーホール、
１２：保護絶縁膜（ＰＳＧ）１３：ベース領域、１４：
第１　）Ｗｊアルミニウム配線、１５：第２ＮＩアルミ
ニウム配線。 第　１　図 第　２「４ 第　３　Ｆ４ ρ 第　４　図

Claims (1)

  1. 【特許請求の範囲】 １、半導体基体内に半導体素子を有し、上記半導体素子
    に接続する配線の一部が２層の金属膜からなるポンディ
    ングパッド部として形成され、この２層の金属膜のうち
    下層の金属膜上の一部に無機性の第１の絶縁膜が重なり
    、上記２攬の金属膜のうち上層の金属膜の周辺上に重な
    る第２の絶縁膜が形成された半導体装置であって、少な
    くとも第一の絶縁膜はポンディングパッド部から外れた
    周縁部で下層の金属膜上に重なるように形成されている
    ことを特徴とする半導体装置。 ２、第１の絶縁膜とポンディングパッド部下渣の金属膜
    との重なり部分の幅は５μｍ以内とする特許請求の範囲
    第１項に記載の半導体装置。 ３、上記ワイヤボンディングは超音波電気振動ボンディ
    ングによりなされるものである特許請求の範囲第１項又
    は第２項に記載の半導体装置。
JP58143823A 1983-08-08 1983-08-08 半導体装置 Pending JPS6035525A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58143823A JPS6035525A (ja) 1983-08-08 1983-08-08 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58143823A JPS6035525A (ja) 1983-08-08 1983-08-08 半導体装置

Publications (1)

Publication Number Publication Date
JPS6035525A true JPS6035525A (ja) 1985-02-23

Family

ID=15347782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58143823A Pending JPS6035525A (ja) 1983-08-08 1983-08-08 半導体装置

Country Status (1)

Country Link
JP (1) JPS6035525A (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5136364A (en) * 1991-06-12 1992-08-04 National Semiconductor Corporation Semiconductor die sealing
JPH07130789A (ja) * 1993-11-04 1995-05-19 Nec Corp 半導体装置
KR100284860B1 (ko) * 1992-08-31 2001-06-01 맥켈러 로버트 루이스 집적회로의 기밀보호방법
WO2005081600A1 (ja) * 2004-02-20 2005-09-01 Nippon Mektron, Ltd. プリント回路基板およびその製造方法
JP2015032603A (ja) * 2013-07-31 2015-02-16 京セラ株式会社 配線基板

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5619639A (en) * 1979-07-27 1981-02-24 Hitachi Ltd Semiconductor device
JPS5629976B2 (ja) * 1973-06-16 1981-07-11
JPS57100739A (en) * 1980-12-16 1982-06-23 Nec Corp Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5629976B2 (ja) * 1973-06-16 1981-07-11
JPS5619639A (en) * 1979-07-27 1981-02-24 Hitachi Ltd Semiconductor device
JPS57100739A (en) * 1980-12-16 1982-06-23 Nec Corp Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5136364A (en) * 1991-06-12 1992-08-04 National Semiconductor Corporation Semiconductor die sealing
KR100284860B1 (ko) * 1992-08-31 2001-06-01 맥켈러 로버트 루이스 집적회로의 기밀보호방법
JPH07130789A (ja) * 1993-11-04 1995-05-19 Nec Corp 半導体装置
WO2005081600A1 (ja) * 2004-02-20 2005-09-01 Nippon Mektron, Ltd. プリント回路基板およびその製造方法
JP2015032603A (ja) * 2013-07-31 2015-02-16 京セラ株式会社 配線基板

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