JPS5619639A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5619639A
JPS5619639A JP9501279A JP9501279A JPS5619639A JP S5619639 A JPS5619639 A JP S5619639A JP 9501279 A JP9501279 A JP 9501279A JP 9501279 A JP9501279 A JP 9501279A JP S5619639 A JPS5619639 A JP S5619639A
Authority
JP
Japan
Prior art keywords
film
opening
bonding
size
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9501279A
Other languages
Japanese (ja)
Other versions
JPS6248892B2 (en
Inventor
Akihiro Tomosawa
Masami Kiyono
Isao Sakamoto
Jiro Sakaguchi
Tokio Kato
Satoshi Meguro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9501279A priority Critical patent/JPS5619639A/en
Publication of JPS5619639A publication Critical patent/JPS5619639A/en
Publication of JPS6248892B2 publication Critical patent/JPS6248892B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05124Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01039Yttrium [Y]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To flatten the peripheral edge of a pad and prevent improper bonding of wires to the semiconductor device by increasing the size A of an opening for a lower insulator film on a substrate larger than the size B of an opening for an insulating film of an upper layer and the size A of the opening of the lower layer larger than the that of the electrode pad. CONSTITUTION:An SiO2 film 2 and PSG film 3 are formed on the Si substrate 1. The first aluminum film 4 becoming a wiring terminal forms a square having one side D, the second aluminum film 6 forming the bonding surface has one side A, a square opening having one side A is perforated at the organic resin film 5 of the lower layer, and a square opening having one side B is formed at the organic resin film 7 of the upper layer. Their sizes may satisfy the relationship of A>C>B>D, where the horizontally moving directions of the capillary of a bonder are X, Y and Y'. This configuration remarkably reduces the relative height of the upper surface of the resin on the peripheral edge of the bonding pad and the aluminum main surface so as to largely reduce the probability of failing the bonding therebetween.
JP9501279A 1979-07-27 1979-07-27 Semiconductor device Granted JPS5619639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9501279A JPS5619639A (en) 1979-07-27 1979-07-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9501279A JPS5619639A (en) 1979-07-27 1979-07-27 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5619639A true JPS5619639A (en) 1981-02-24
JPS6248892B2 JPS6248892B2 (en) 1987-10-16

Family

ID=14126046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9501279A Granted JPS5619639A (en) 1979-07-27 1979-07-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5619639A (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56105644A (en) * 1980-01-25 1981-08-22 Mitsubishi Electric Corp Semiconductor ic device
JPS57150947U (en) * 1981-03-16 1982-09-22
JPS5840835A (en) * 1981-09-03 1983-03-09 Nec Corp Semiconductor device
JPS6035525A (en) * 1983-08-08 1985-02-23 Hitachi Micro Comput Eng Ltd Semiconductor device
JPS6072253A (en) * 1983-09-28 1985-04-24 Oki Electric Ind Co Ltd Semiconductor device
JPS60257550A (en) * 1984-06-04 1985-12-19 Mitsubishi Electric Corp Semiconductor device
JPH01305531A (en) * 1988-06-03 1989-12-08 Nec Corp Semiconductor device having improved bonding pad
US4893168A (en) * 1981-06-22 1990-01-09 Hitachi, Ltd. Semiconductor integrated circuit device including bonding pads and fabricating method thereof
JPH02251158A (en) * 1989-03-24 1990-10-08 Nec Corp Semiconductor device
EP0451939A2 (en) * 1990-02-26 1991-10-16 Canon Kabushiki Kaisha Recording apparatus with a recording head having a wiring substrate
US5227812A (en) * 1990-02-26 1993-07-13 Canon Kabushiki Kaisha Liquid jet recording head with bump connector wiring
JP4865913B2 (en) * 2009-02-04 2012-02-01 パナソニック株式会社 Semiconductor substrate structure and semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02113522U (en) * 1989-02-28 1990-09-11

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5317165U (en) * 1976-07-23 1978-02-14

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5317165B2 (en) * 1974-03-12 1978-06-06

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5317165U (en) * 1976-07-23 1978-02-14

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56105644A (en) * 1980-01-25 1981-08-22 Mitsubishi Electric Corp Semiconductor ic device
JPS57150947U (en) * 1981-03-16 1982-09-22
US4893168A (en) * 1981-06-22 1990-01-09 Hitachi, Ltd. Semiconductor integrated circuit device including bonding pads and fabricating method thereof
JPS6236386B2 (en) * 1981-09-03 1987-08-06 Nippon Electric Co
JPS5840835A (en) * 1981-09-03 1983-03-09 Nec Corp Semiconductor device
JPS6035525A (en) * 1983-08-08 1985-02-23 Hitachi Micro Comput Eng Ltd Semiconductor device
JPS6072253A (en) * 1983-09-28 1985-04-24 Oki Electric Ind Co Ltd Semiconductor device
JPH0330986B2 (en) * 1983-09-28 1991-05-01 Oki Electric Ind Co Ltd
JPS60257550A (en) * 1984-06-04 1985-12-19 Mitsubishi Electric Corp Semiconductor device
JPH01305531A (en) * 1988-06-03 1989-12-08 Nec Corp Semiconductor device having improved bonding pad
JPH02251158A (en) * 1989-03-24 1990-10-08 Nec Corp Semiconductor device
EP0451939A2 (en) * 1990-02-26 1991-10-16 Canon Kabushiki Kaisha Recording apparatus with a recording head having a wiring substrate
US5227812A (en) * 1990-02-26 1993-07-13 Canon Kabushiki Kaisha Liquid jet recording head with bump connector wiring
US5576748A (en) * 1990-02-26 1996-11-19 Canon Kabushiki Kaisha Recording head with through-hole wiring connection which is disposed within the liquid chamber
JP4865913B2 (en) * 2009-02-04 2012-02-01 パナソニック株式会社 Semiconductor substrate structure and semiconductor device
US8378505B2 (en) 2009-02-04 2013-02-19 Panasonic Corporation Semiconductor substrate structure and semiconductor device

Also Published As

Publication number Publication date
JPS6248892B2 (en) 1987-10-16

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