JPS54160185A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS54160185A
JPS54160185A JP6953478A JP6953478A JPS54160185A JP S54160185 A JPS54160185 A JP S54160185A JP 6953478 A JP6953478 A JP 6953478A JP 6953478 A JP6953478 A JP 6953478A JP S54160185 A JPS54160185 A JP S54160185A
Authority
JP
Japan
Prior art keywords
layer
region
film
mos
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6953478A
Other languages
Japanese (ja)
Other versions
JPS6252465B2 (en
Inventor
Yoshiyuki Okubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6953478A priority Critical patent/JPS54160185A/en
Publication of JPS54160185A publication Critical patent/JPS54160185A/en
Publication of JPS6252465B2 publication Critical patent/JPS6252465B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4845—Details of ball bonds
    • H01L2224/48451—Shape
    • H01L2224/48453—Shape of the interface with the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: To minimize the chip size and thus to reduce the cost by constituting the MOS-type capacitor with the thickness set under 1200Å for the insulated layer which is to be positioned under the metal layer to which the external connection metal thin wire is connected.
CONSTITUTION: N-type region 12 featuring the fixed impurity density is formed by diffusion at the surface layer part of N-type Si substrate 11, and SiO2 film 13 is grown on region 12 forming the MOS-type capacitor as well as at the region surrounding region 12 with thickness of under 1200Å and about 1μm respectively. Then Al layer 14 is coated on film 13, and wire 16 attached at the area of bonding pad 15 opposing to region 12. Thus, film 13 is held between substrate 11 and layer 14 to form MOS-type capacitor 17. Layer 14 can be used also for the mutual wiring within the IC device, thus minimizing the chip size.
COPYRIGHT: (C)1979,JPO&Japio
JP6953478A 1978-06-09 1978-06-09 Semiconductor integrated circuit device Granted JPS54160185A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6953478A JPS54160185A (en) 1978-06-09 1978-06-09 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6953478A JPS54160185A (en) 1978-06-09 1978-06-09 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS54160185A true JPS54160185A (en) 1979-12-18
JPS6252465B2 JPS6252465B2 (en) 1987-11-05

Family

ID=13405479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6953478A Granted JPS54160185A (en) 1978-06-09 1978-06-09 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS54160185A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59228732A (en) * 1983-06-10 1984-12-22 Toshiba Corp Master slice type semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4911587A (en) * 1972-06-01 1974-02-01
JPS5027904U (en) * 1973-07-11 1975-03-31
JPS51874U (en) * 1974-06-18 1976-01-06
JPS5432086A (en) * 1977-08-16 1979-03-09 Nec Corp Semiconductor capacity element

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4911587A (en) * 1972-06-01 1974-02-01
JPS5027904U (en) * 1973-07-11 1975-03-31
JPS51874U (en) * 1974-06-18 1976-01-06
JPS5432086A (en) * 1977-08-16 1979-03-09 Nec Corp Semiconductor capacity element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59228732A (en) * 1983-06-10 1984-12-22 Toshiba Corp Master slice type semiconductor device

Also Published As

Publication number Publication date
JPS6252465B2 (en) 1987-11-05

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