JPS54133877A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS54133877A JPS54133877A JP4167578A JP4167578A JPS54133877A JP S54133877 A JPS54133877 A JP S54133877A JP 4167578 A JP4167578 A JP 4167578A JP 4167578 A JP4167578 A JP 4167578A JP S54133877 A JPS54133877 A JP S54133877A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- lead
- bump
- terminal
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
PURPOSE: To reduce the size of a chip remarkably, and also to increase connection strength between an electrode terminal and a lead wire, by providing the region of the electrode terminal onto an activation region too.
CONSTITUTION: Activation region 11 is formed on semiconductor substrate 10 and its circumferential part is used as electrode-terminal region 12, thereby forming bump 13 while intruding into activation region 11. The structure of wiring lead 15 fixed to this bump 13 is mentioned hereafter. Namely, polyimide film 16 is stuck to the reverse surface of lead 15, and insulation coating of organic resin 17 is adhered to its top surface; and an opening is made in film 17 at a part touching bump 13 and electrode-terminal connection part 14 at the tip is exposed. Consequently, lead 15 can be connected to bump 13 positioned at the center part of the semiconductor device, and the width of lead 15 extending from electrode- terminal connection part 14 can be made small, so that the chip size can be reduced.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4167578A JPS54133877A (en) | 1978-04-07 | 1978-04-07 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4167578A JPS54133877A (en) | 1978-04-07 | 1978-04-07 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54133877A true JPS54133877A (en) | 1979-10-17 |
Family
ID=12614979
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4167578A Pending JPS54133877A (en) | 1978-04-07 | 1978-04-07 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54133877A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63276235A (en) * | 1987-05-08 | 1988-11-14 | Nec Corp | Semiconductor integrated circuit device |
JPH0195539A (en) * | 1987-10-07 | 1989-04-13 | Toshiba Corp | Semiconductor device |
JPH01253246A (en) * | 1988-03-31 | 1989-10-09 | Toshiba Corp | Semiconductor integrated circuit mounting substrate, manufacture thereof and semiconductor integrated circuit device |
JP2002289651A (en) * | 2000-12-12 | 2002-10-04 | Mitsui Mining & Smelting Co Ltd | Chip-on film base and its manufacturing method |
JP2005117036A (en) * | 2003-10-04 | 2005-04-28 | Samsung Electronics Co Ltd | Tape circuit board and semiconductor chip package utilizing same |
-
1978
- 1978-04-07 JP JP4167578A patent/JPS54133877A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63276235A (en) * | 1987-05-08 | 1988-11-14 | Nec Corp | Semiconductor integrated circuit device |
JPH0195539A (en) * | 1987-10-07 | 1989-04-13 | Toshiba Corp | Semiconductor device |
JPH01253246A (en) * | 1988-03-31 | 1989-10-09 | Toshiba Corp | Semiconductor integrated circuit mounting substrate, manufacture thereof and semiconductor integrated circuit device |
JP2002289651A (en) * | 2000-12-12 | 2002-10-04 | Mitsui Mining & Smelting Co Ltd | Chip-on film base and its manufacturing method |
JP2005117036A (en) * | 2003-10-04 | 2005-04-28 | Samsung Electronics Co Ltd | Tape circuit board and semiconductor chip package utilizing same |
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