JPS5275979A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5275979A
JPS5275979A JP50151964A JP15196475A JPS5275979A JP S5275979 A JPS5275979 A JP S5275979A JP 50151964 A JP50151964 A JP 50151964A JP 15196475 A JP15196475 A JP 15196475A JP S5275979 A JPS5275979 A JP S5275979A
Authority
JP
Japan
Prior art keywords
semiconductor device
metal layer
bump electrode
devising
adhesiveness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50151964A
Other languages
Japanese (ja)
Inventor
Kenichi Goto
Kazuo Watanabe
Masafumi Miyagawa
Tsuneo Atsumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP50151964A priority Critical patent/JPS5275979A/en
Publication of JPS5275979A publication Critical patent/JPS5275979A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE: To improve the dielectric strength and reliability of a planar diode having a bump electrode by improving the adhesiveness of the metal layer to be provided between the bump electrode and a semiconductor layer to an oxide film and devising the shape of said metal layer.
COPYRIGHT: (C)1977,JPO&Japio
JP50151964A 1975-12-22 1975-12-22 Semiconductor device Pending JPS5275979A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50151964A JPS5275979A (en) 1975-12-22 1975-12-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50151964A JPS5275979A (en) 1975-12-22 1975-12-22 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5275979A true JPS5275979A (en) 1977-06-25

Family

ID=15530051

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50151964A Pending JPS5275979A (en) 1975-12-22 1975-12-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5275979A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54122983A (en) * 1978-03-17 1979-09-22 Hitachi Ltd Semiconductor integrated circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54122983A (en) * 1978-03-17 1979-09-22 Hitachi Ltd Semiconductor integrated circuit
JPS6321347B2 (en) * 1978-03-17 1988-05-06 Hitachi Seisakusho Kk

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