JPS60241244A - ピングリッドアレイ型半導体装置の製造方法 - Google Patents

ピングリッドアレイ型半導体装置の製造方法

Info

Publication number
JPS60241244A
JPS60241244A JP59096535A JP9653584A JPS60241244A JP S60241244 A JPS60241244 A JP S60241244A JP 59096535 A JP59096535 A JP 59096535A JP 9653584 A JP9653584 A JP 9653584A JP S60241244 A JPS60241244 A JP S60241244A
Authority
JP
Japan
Prior art keywords
hole
semiconductor device
substrate
brazing material
external terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59096535A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0478015B2 (enExample
Inventor
Takayuki Okinaga
隆幸 沖永
Hiroshi Tate
宏 舘
Hiroshi Ozaki
尾崎 弘
Kanji Otsuka
寛治 大塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP59096535A priority Critical patent/JPS60241244A/ja
Publication of JPS60241244A publication Critical patent/JPS60241244A/ja
Publication of JPH0478015B2 publication Critical patent/JPH0478015B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP59096535A 1984-05-16 1984-05-16 ピングリッドアレイ型半導体装置の製造方法 Granted JPS60241244A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59096535A JPS60241244A (ja) 1984-05-16 1984-05-16 ピングリッドアレイ型半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59096535A JPS60241244A (ja) 1984-05-16 1984-05-16 ピングリッドアレイ型半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS60241244A true JPS60241244A (ja) 1985-11-30
JPH0478015B2 JPH0478015B2 (enExample) 1992-12-10

Family

ID=14167813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59096535A Granted JPS60241244A (ja) 1984-05-16 1984-05-16 ピングリッドアレイ型半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60241244A (enExample)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6292352A (ja) * 1985-10-17 1987-04-27 Tanaka Denshi Kogyo Kk チツプオンボ−ドのリ−ドピン
JPS62219952A (ja) * 1986-03-20 1987-09-28 Ibiden Co Ltd 半導体塔載用基板
JPS6370448A (ja) * 1986-09-11 1988-03-30 Ibiden Co Ltd 半導体搭載用基板
JPS63158858A (ja) * 1986-12-22 1988-07-01 Ibiden Co Ltd 半導体搭載用基板の製造方法およびそれに用いられる治具板
JPH01117084A (ja) * 1987-10-29 1989-05-09 Nec Corp プラスチックピングリッドアレイパッケージ
US5036431A (en) * 1988-03-03 1991-07-30 Ibiden Co., Ltd. Package for surface mounted components
US5592025A (en) * 1992-08-06 1997-01-07 Motorola, Inc. Pad array semiconductor device
KR20030004644A (ko) * 2001-07-06 2003-01-15 홍성결 피지에이 패키지용 압착 리드핀

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS48101878A (enExample) * 1972-04-03 1973-12-21
JPS509759U (enExample) * 1973-05-24 1975-01-31
JPS50121258A (enExample) * 1974-03-08 1975-09-23
JPS5256366A (en) * 1975-11-04 1977-05-09 Sony Corp Method of conducting bothhside printed substrate
JPS5810848A (ja) * 1981-07-14 1983-01-21 Toshiba Corp 混成集積回路用リ−ドピン
JPS58159355A (ja) * 1982-03-17 1983-09-21 Nec Corp 半導体装置の製造方法
JPS5982757A (ja) * 1982-11-04 1984-05-12 Toshiba Corp 半導体用ステムおよびその製造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS48101878A (enExample) * 1972-04-03 1973-12-21
JPS509759U (enExample) * 1973-05-24 1975-01-31
JPS50121258A (enExample) * 1974-03-08 1975-09-23
JPS5256366A (en) * 1975-11-04 1977-05-09 Sony Corp Method of conducting bothhside printed substrate
JPS5810848A (ja) * 1981-07-14 1983-01-21 Toshiba Corp 混成集積回路用リ−ドピン
JPS58159355A (ja) * 1982-03-17 1983-09-21 Nec Corp 半導体装置の製造方法
JPS5982757A (ja) * 1982-11-04 1984-05-12 Toshiba Corp 半導体用ステムおよびその製造方法

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6292352A (ja) * 1985-10-17 1987-04-27 Tanaka Denshi Kogyo Kk チツプオンボ−ドのリ−ドピン
JPS62219952A (ja) * 1986-03-20 1987-09-28 Ibiden Co Ltd 半導体塔載用基板
JPS6370448A (ja) * 1986-09-11 1988-03-30 Ibiden Co Ltd 半導体搭載用基板
JPS63158858A (ja) * 1986-12-22 1988-07-01 Ibiden Co Ltd 半導体搭載用基板の製造方法およびそれに用いられる治具板
JPH01117084A (ja) * 1987-10-29 1989-05-09 Nec Corp プラスチックピングリッドアレイパッケージ
US5036431A (en) * 1988-03-03 1991-07-30 Ibiden Co., Ltd. Package for surface mounted components
US5592025A (en) * 1992-08-06 1997-01-07 Motorola, Inc. Pad array semiconductor device
KR20030004644A (ko) * 2001-07-06 2003-01-15 홍성결 피지에이 패키지용 압착 리드핀

Also Published As

Publication number Publication date
JPH0478015B2 (enExample) 1992-12-10

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