JPS60164847A - スキヤン制御方式 - Google Patents
スキヤン制御方式Info
- Publication number
- JPS60164847A JPS60164847A JP59021173A JP2117384A JPS60164847A JP S60164847 A JPS60164847 A JP S60164847A JP 59021173 A JP59021173 A JP 59021173A JP 2117384 A JP2117384 A JP 2117384A JP S60164847 A JPS60164847 A JP S60164847A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- scan
- state
- stopped
- latch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59021173A JPS60164847A (ja) | 1984-02-08 | 1984-02-08 | スキヤン制御方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59021173A JPS60164847A (ja) | 1984-02-08 | 1984-02-08 | スキヤン制御方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60164847A true JPS60164847A (ja) | 1985-08-27 |
JPS6362775B2 JPS6362775B2 (enrdf_load_stackoverflow) | 1988-12-05 |
Family
ID=12047526
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59021173A Granted JPS60164847A (ja) | 1984-02-08 | 1984-02-08 | スキヤン制御方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60164847A (enrdf_load_stackoverflow) |
-
1984
- 1984-02-08 JP JP59021173A patent/JPS60164847A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6362775B2 (enrdf_load_stackoverflow) | 1988-12-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5263172A (en) | Multiple speed synchronous bus having single clock path for providing first or second clock speed based upon speed indication signals | |
JP2614345B2 (ja) | スキャンフリップフロップ | |
JPH0786525B2 (ja) | 診断回路 | |
JPS6128154A (ja) | 割込みインタフエ−ス回路 | |
JPH07306827A (ja) | P/q整数比関係を有する周波数で動作するディジタル装置間で同期データ伝送を行うための方法および装置 | |
JPS6329276A (ja) | 論理lsi | |
JPS6293672A (ja) | 階層型論理装置 | |
JPS60164847A (ja) | スキヤン制御方式 | |
JPS6129577B2 (enrdf_load_stackoverflow) | ||
JP4806747B2 (ja) | シリアライザ/デシリアライザ・バスコントローラ・インターフェース | |
JP2551187B2 (ja) | スキャン動作実行方式 | |
JPS6331935B2 (enrdf_load_stackoverflow) | ||
JP2903548B2 (ja) | 論理回路診断システム | |
JPH1173389A (ja) | データ伝送路 | |
JP2722567B2 (ja) | テスト選択回路 | |
JPS6156543B2 (enrdf_load_stackoverflow) | ||
JPS6336535B2 (enrdf_load_stackoverflow) | ||
JPH0611486Y2 (ja) | リセツト状態検出回路 | |
JP3236235B2 (ja) | トグルフリップフロップ | |
JPH0632049B2 (ja) | マイクロコンピュータ装置 | |
JPH0746123B2 (ja) | 集積回路の試験方式 | |
JPH0422220A (ja) | タイマー回路 | |
JPH03214329A (ja) | 集積回路装置のテスト回路 | |
JPS5923661A (ja) | パルス通信回路 | |
JPH07121366A (ja) | マイクロプロセッサのウエイト制御システム |