JPS6336535B2 - - Google Patents

Info

Publication number
JPS6336535B2
JPS6336535B2 JP58200584A JP20058483A JPS6336535B2 JP S6336535 B2 JPS6336535 B2 JP S6336535B2 JP 58200584 A JP58200584 A JP 58200584A JP 20058483 A JP20058483 A JP 20058483A JP S6336535 B2 JPS6336535 B2 JP S6336535B2
Authority
JP
Japan
Prior art keywords
scan
signal
shift
value
shift register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58200584A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6093559A (ja
Inventor
Hiroyuki Nakano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58200584A priority Critical patent/JPS6093559A/ja
Publication of JPS6093559A publication Critical patent/JPS6093559A/ja
Publication of JPS6336535B2 publication Critical patent/JPS6336535B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
JP58200584A 1983-10-26 1983-10-26 スキヤン方式 Granted JPS6093559A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58200584A JPS6093559A (ja) 1983-10-26 1983-10-26 スキヤン方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58200584A JPS6093559A (ja) 1983-10-26 1983-10-26 スキヤン方式

Publications (2)

Publication Number Publication Date
JPS6093559A JPS6093559A (ja) 1985-05-25
JPS6336535B2 true JPS6336535B2 (enrdf_load_stackoverflow) 1988-07-20

Family

ID=16426768

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58200584A Granted JPS6093559A (ja) 1983-10-26 1983-10-26 スキヤン方式

Country Status (1)

Country Link
JP (1) JPS6093559A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4491174B2 (ja) * 2001-08-31 2010-06-30 富士通株式会社 アクセス制御装置及び試験方法
JP2005190112A (ja) * 2003-12-25 2005-07-14 Internatl Business Mach Corp <Ibm> マイクロコンピュータ及びそのデバッグ方法

Also Published As

Publication number Publication date
JPS6093559A (ja) 1985-05-25

Similar Documents

Publication Publication Date Title
US6366530B1 (en) Synchronizing data operations across a synchronization boundary between different clock domains using two-hot encoding
US4070630A (en) Data transfer synchronizing circuit
JP3197026B2 (ja) 遅延試験能力を有する走査可能なレジスタ
JP2550837B2 (ja) スキャンパスのテスト制御回路
JP4794059B2 (ja) 半導体装置
US6810498B2 (en) RAM functional test facilitation circuit with reduced scale
JPS6336535B2 (enrdf_load_stackoverflow)
US6202185B1 (en) Methods and apparatus for facilitating scan testing of circuitry
JPS59211146A (ja) スキヤンイン方法
JP2003255025A (ja) 半導体集積回路
US6990596B2 (en) Memory device outputting read data in a time starting from a rising edge of an external clock that is shorter than that of known devices
JPS6316276A (ja) 半導体集積回路
JPS6323581B2 (enrdf_load_stackoverflow)
JP2783495B2 (ja) クロック乗せ換え回路
JP4524724B2 (ja) 入出力装置
JP2848619B2 (ja) テスト容易化回路
JP3236235B2 (ja) トグルフリップフロップ
JPS5932819B2 (ja) アドレス制御装置
JPH06118138A (ja) テスト回路
JPS6149698B2 (enrdf_load_stackoverflow)
KR950001175B1 (ko) 개선된 데이타 시프트 레지스터
JPH01233514A (ja) 書込み／読出し非同期形ｆｉｆｏ式バッファ
JPH10247392A (ja) アドレスカウンタ回路及び半導体メモリ装置
JPH11239193A (ja) クロック同期式通信装置
JPH03154935A (ja) 論理回路の試験方式