JPS6014348A - スキヤンレジスタ構成方法 - Google Patents

スキヤンレジスタ構成方法

Info

Publication number
JPS6014348A
JPS6014348A JP58120567A JP12056783A JPS6014348A JP S6014348 A JPS6014348 A JP S6014348A JP 58120567 A JP58120567 A JP 58120567A JP 12056783 A JP12056783 A JP 12056783A JP S6014348 A JPS6014348 A JP S6014348A
Authority
JP
Japan
Prior art keywords
register
flip
output
clock
scan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58120567A
Other languages
English (en)
Japanese (ja)
Other versions
JPS633342B2 (enrdf_load_stackoverflow
Inventor
Toshiro Tanaka
田中 利郎
Katsuyuki Okada
勝行 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP58120567A priority Critical patent/JPS6014348A/ja
Publication of JPS6014348A publication Critical patent/JPS6014348A/ja
Publication of JPS633342B2 publication Critical patent/JPS633342B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536Scan chain arrangements, e.g. connections, test bus, analog signals

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP58120567A 1983-07-01 1983-07-01 スキヤンレジスタ構成方法 Granted JPS6014348A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58120567A JPS6014348A (ja) 1983-07-01 1983-07-01 スキヤンレジスタ構成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58120567A JPS6014348A (ja) 1983-07-01 1983-07-01 スキヤンレジスタ構成方法

Publications (2)

Publication Number Publication Date
JPS6014348A true JPS6014348A (ja) 1985-01-24
JPS633342B2 JPS633342B2 (enrdf_load_stackoverflow) 1988-01-22

Family

ID=14789498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58120567A Granted JPS6014348A (ja) 1983-07-01 1983-07-01 スキヤンレジスタ構成方法

Country Status (1)

Country Link
JP (1) JPS6014348A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS633342B2 (enrdf_load_stackoverflow) 1988-01-22

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