JPS6010651A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6010651A
JPS6010651A JP58118516A JP11851683A JPS6010651A JP S6010651 A JPS6010651 A JP S6010651A JP 58118516 A JP58118516 A JP 58118516A JP 11851683 A JP11851683 A JP 11851683A JP S6010651 A JPS6010651 A JP S6010651A
Authority
JP
Japan
Prior art keywords
external lead
semiconductor chip
lead terminals
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58118516A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0451980B2 (cg-RX-API-DMAC7.html
Inventor
Takeyumi Abe
阿部 剛弓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58118516A priority Critical patent/JPS6010651A/ja
Publication of JPS6010651A publication Critical patent/JPS6010651A/ja
Publication of JPH0451980B2 publication Critical patent/JPH0451980B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061Disposition
    • H01L2224/0612Layout
    • H01L2224/0615Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/06154Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry covering only portions of the surface to be connected
    • H01L2224/06155Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49177Combinations of different arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP58118516A 1983-06-30 1983-06-30 半導体装置 Granted JPS6010651A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58118516A JPS6010651A (ja) 1983-06-30 1983-06-30 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58118516A JPS6010651A (ja) 1983-06-30 1983-06-30 半導体装置

Publications (2)

Publication Number Publication Date
JPS6010651A true JPS6010651A (ja) 1985-01-19
JPH0451980B2 JPH0451980B2 (cg-RX-API-DMAC7.html) 1992-08-20

Family

ID=14738557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58118516A Granted JPS6010651A (ja) 1983-06-30 1983-06-30 半導体装置

Country Status (1)

Country Link
JP (1) JPS6010651A (cg-RX-API-DMAC7.html)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61163654A (ja) * 1985-01-11 1986-07-24 Mitsubishi Electric Corp 半導体装置用リ−ドフレ−ムおよびそれを用いた半導体装置
EP0242962A1 (en) * 1986-04-25 1987-10-28 Inmos Corporation Offset pad semiconductor lead frame
JPS63244658A (ja) * 1987-03-30 1988-10-12 Mitsubishi Electric Corp 半導体装置
US4974053A (en) * 1988-10-06 1990-11-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device for multiple packaging configurations
JPH08241949A (ja) * 1996-03-11 1996-09-17 Mitsubishi Electric Corp 半導体装置
DE102005062344A1 (de) * 2005-12-23 2007-07-05 Infineon Technologies Ag Halbleiterbauteil und Vorrichtung zur Herstellung eines Halbleiterbauteils
WO2023176267A1 (ja) * 2022-03-17 2023-09-21 ローム株式会社 半導体装置

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61163654A (ja) * 1985-01-11 1986-07-24 Mitsubishi Electric Corp 半導体装置用リ−ドフレ−ムおよびそれを用いた半導体装置
EP0242962A1 (en) * 1986-04-25 1987-10-28 Inmos Corporation Offset pad semiconductor lead frame
JPS63244658A (ja) * 1987-03-30 1988-10-12 Mitsubishi Electric Corp 半導体装置
US4974053A (en) * 1988-10-06 1990-11-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor device for multiple packaging configurations
JPH08241949A (ja) * 1996-03-11 1996-09-17 Mitsubishi Electric Corp 半導体装置
DE102005062344A1 (de) * 2005-12-23 2007-07-05 Infineon Technologies Ag Halbleiterbauteil und Vorrichtung zur Herstellung eines Halbleiterbauteils
DE102005062344B4 (de) * 2005-12-23 2010-08-19 Infineon Technologies Ag Halbleiterbauteil für Hochfrequenzanwendungen und Verfahren zur Herstellung eines derartigen Halbleiterbauteils
US7838989B2 (en) 2005-12-23 2010-11-23 Infineon Technologies Ag Semiconductor component and apparatus for production of a semiconductor component
WO2023176267A1 (ja) * 2022-03-17 2023-09-21 ローム株式会社 半導体装置

Also Published As

Publication number Publication date
JPH0451980B2 (cg-RX-API-DMAC7.html) 1992-08-20

Similar Documents

Publication Publication Date Title
US5592019A (en) Semiconductor device and module
JP2518569B2 (ja) 半導体装置
EP0538003B1 (en) Method of manufacturing inversion type ICs and IC module using same
KR100328906B1 (ko) 리드프레임의리드온칩내부리드를결합하는방법및장치
EP0710982B1 (en) Personalized area leadframe coining or half etching for reduced mechanical stress at device edge
US6121690A (en) Semiconductor device having two pluralities of electrode pads, pads of different pluralities having different widths and respective pads of different pluralities having an aligned transverse edge
JPH06151641A (ja) 半導体装置
JPH1012658A (ja) 入出力端子を多数有する半導体集積回路素子
JPS6010651A (ja) 半導体装置
US7256480B2 (en) Lead frame package structure with high density of lead pins arrangement
JPH0629429A (ja) 半導体装置
JPS6265449A (ja) 半導体集積回路装置
JPH0233961A (ja) リードフレーム
JP3078526B2 (ja) 樹脂封止型半導体装置
KR20020045495A (ko) 봉지형 반도체 장치 및 이에 사용되는 리드 프레임
JPH04134853A (ja) 半導体装置用リードフレーム
KR950006443Y1 (ko) 반도체 패키지용 리드프레임
JPH0547819A (ja) 半導体装置
JPS6384054A (ja) 樹脂封止型半導体装置
JP2563507Y2 (ja) 半導体装置
JPH02166743A (ja) 半導体集積回路装置
JPS6079733A (ja) 半導体装置
JPS60226152A (ja) リ−ドフレ−ム
JPH0888310A (ja) 樹脂封止半導体装置
JPH04163956A (ja) 半導体装置用リードフレーム