JPS599931A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS599931A
JPS599931A JP57117687A JP11768782A JPS599931A JP S599931 A JPS599931 A JP S599931A JP 57117687 A JP57117687 A JP 57117687A JP 11768782 A JP11768782 A JP 11768782A JP S599931 A JPS599931 A JP S599931A
Authority
JP
Japan
Prior art keywords
pellet
fixing
agent
semiconductor device
bed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57117687A
Other languages
English (en)
Inventor
Yoichi Kobayashi
陽一 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57117687A priority Critical patent/JPS599931A/ja
Publication of JPS599931A publication Critical patent/JPS599931A/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10158—Shape being other than a cuboid at the passive surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 ［発明の技術分野］ 本発明は半導体装置に係り：とくに半導体ベレットをリ
ードフレームにマウントして封止する半導体装置に関す
る。
［発明の技術的背景と問題点］ 従来の半導体装置を、第１図及び第２図を用いて説明す
る。第１図は半導体装置の横断面図である。また、第２
図はベレット載置部の平面図である。半導体ベレット１
がリードフレームのベレット固定用ベッド２上に、マウ
ント剤３によって固定されている。またベレットｌの電
極と１−で形成されているアルミパッド４（！：リード
端子６がワイヤ５で接続されている。そして全体が樹脂
７によって封止されている。
このような構造の従来の半導体装置には以下に瀝べるよ
うな欠点があった。すなわち、ベレット１を固定するた
めのマウント剤３がベレット１の側面を這い上がり易く
、硬化したマウント剤３がアルミパッド４やワイヤ５に
極めて接近した構造になることが多い。その場合、この
マウント剤３に含まれるクロル、ナトリウム等の物質が
、モールド樹脂７中に浸入して来た水分に溶は出し、ア
ルミハツト４やワイヤ５などを除々に腐食させてしまう
結果となる。この現象が半導体装置の耐湿性向上を妨げ
る大きな要因になっていた。
［発明の目的］ 本発明は以上のような従来技術の欠截を改善し、耐湿性
のすぐれた半導体装置を提供することを目的とする。
［発明の概要］ 本発明はベレットを固定する素子載置部を、ベレットの
固定部の面積より小さく形成し、この素子載置部にベレ
ットを固定し、ベレットの電極とリード端子との接続配
線を行なった後、全体を封止したことを特徴とする。
以上の構成によれば、マウント剤がベレットの側面を這
い上がることがなく、マウント剤と配線部が大きく隔て
られている構造にすることができる。
［発明の実施例］ 本発明の一実施例を第３図乃至第４図を用いて説明する
。第３図はその断面図、第４図はベレット載置部の平面
図である。半導体ベレット３１がリードフレームのベレ
ット固定用ベッド３２上にエポキシ系のマウント剤３３
によって固定されている。
ベッド３２はベレット３１の固定される面よシも小さい
面積に形成されている。ベレット３１の表面には電極用
のアルミパッドあが形成されている。このアルミパッド
調とリードフレームのリード端子あがＡＩ！ワイヤあで
接続されている。そして全体がエポキシ系の封止樹脂３
７で封止されている。
ベレット３１を載置するベッド３２は、ベレットの面積
より小さく形成されているため、ベレットを固定するた
めのマウント剤おが必要量以上に付着されているときで
もマウント剤３３がベレット３２の側面を這い上がって
くることはない。ベレットとベッドの大きさの関係は特
に厳密に規定されるものではなく、例えばベッドの面積
はベレット面積に対して７０〜８０　％の面積にすれば
よい。従来技術ではマウント剤がベレットを取シ囲むよ
うに存在したため、マウント剤の這い上がシが生じたが
。
本実施例のようにマウント剤がベレットの底面のみに付
着すれば、余分なマウント剤は、むしろベッドの下方に
押し出されて、ベレット上方には近づくことができない
。また素子載置用のベッドの面積が小さくなったと・は
いえ、本実施例では、ベレットを固定する安定性が悪く
なることはまったくない。
［発明の効果］ 本発明によれば、マウント剤に起因する配線部の腐食を
防止することができる。このため、装置の耐湿性を向上
させることができ、信頼性の高い製品が得られる。また
作業工程においても、従来はマウント剤の量が多すぎな
いようにその量の制御に気を配らなければならなかった
が５本発明によれば、マウント剤の量が必要以上に多く
ても問題にしなくてよいので、作業能率が向上する。
本発明は水分の浸入しやすい樹脂封止型半導体装［１’
ｌいて有効であり、とくにフラットパッケージのように
ベレットが薄く、しかも封止樹脂層も薄くて水分の浸入
しやすいもので有効である。
≠
【図面の簡単な説明】
第１図は従来の半導体装置の断面図である。第２図は従
来の半導体装置の素子載置部の平面図である。第３図は
本発明の半導体装置の断面図である。第４図は本発明の
半導体装置の素子載置部の平面図である。 ３１・・・半導体ベレット、　３２・・・素子載置部、
３３・・・マウント剤、調用電極、あ・・・ワイヤ、あ
・・・リード端子、３７・・・封止樹脂。 （７３１７）代理人　弁理士　　則　近　憲　佑（ほか
１名） １１図 −１３９−

Claims (2)

    【特許請求の範囲】
  1. （１）半導体ベレットと、このベレットを載置しその載
    置面が前記ベレットの底面よシ小さい面積に形成された
    素子載置部と、この素子載置部に前記ベレットを固定す
    るために前記ベレット底面と前記載置面を接着するマウ
    ント剤と、前記ベレット上に設けられた電極と、この電
    極とリード端子を接続するワイヤと、これらを封止する
    封止樹脂とを有することを特徴とする半導体装置。
  2. （２）リード端子が平面的に導出され、封止樹脂の厚さ
    を薄くしたフラットパッケージタイプに形成されている
    ことを特徴とする特許請求の範囲第１項記載の半導体装
    置。
JP57117687A 1982-07-08 1982-07-08 半導体装置 Pending JPS599931A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57117687A JPS599931A (ja) 1982-07-08 1982-07-08 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57117687A JPS599931A (ja) 1982-07-08 1982-07-08 半導体装置

Publications (1)

Publication Number Publication Date
JPS599931A true JPS599931A (ja) 1984-01-19

Family

ID=14717804

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57117687A Pending JPS599931A (ja) 1982-07-08 1982-07-08 半導体装置

Country Status (1)

Country Link
JP (1) JPS599931A (ja)

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