JPS5984551A - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS5984551A JPS5984551A JP57195476A JP19547682A JPS5984551A JP S5984551 A JPS5984551 A JP S5984551A JP 57195476 A JP57195476 A JP 57195476A JP 19547682 A JP19547682 A JP 19547682A JP S5984551 A JPS5984551 A JP S5984551A
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- layer
- semiconductor device
- insulating film
- stepped
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 28
- 239000010410 layer Substances 0.000 claims abstract description 74
- 239000011229 interlayer Substances 0.000 claims abstract description 7
- 229910052751 metal Inorganic materials 0.000 claims description 41
- 239000002184 metal Substances 0.000 claims description 40
- 230000000694 effects Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000008188 pellet Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/25—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57195476A JPS5984551A (ja) | 1982-11-08 | 1982-11-08 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57195476A JPS5984551A (ja) | 1982-11-08 | 1982-11-08 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5984551A true JPS5984551A (ja) | 1984-05-16 |
| JPS6362105B2 JPS6362105B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1988-12-01 |
Family
ID=16341714
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57195476A Granted JPS5984551A (ja) | 1982-11-08 | 1982-11-08 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5984551A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0382453A (ja) * | 1989-08-25 | 1991-04-08 | Takara Belmont Co Ltd | Ｘ線撮影装置 |
| JPH03191948A (ja) * | 1989-12-20 | 1991-08-21 | Tokyo Emitsukusu:Kk | パノラマｘ線撮影装置 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS494622U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1972-04-13 | 1974-01-15 | ||
| JPS51127265U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1975-04-09 | 1976-10-14 | ||
| JPS52131455A (en) * | 1976-04-28 | 1977-11-04 | Hitachi Ltd | Semiconductor device |
-
1982
- 1982-11-08 JP JP57195476A patent/JPS5984551A/ja active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS494622U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1972-04-13 | 1974-01-15 | ||
| JPS51127265U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1975-04-09 | 1976-10-14 | ||
| JPS52131455A (en) * | 1976-04-28 | 1977-11-04 | Hitachi Ltd | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6362105B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1988-12-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3305211B2 (ja) | 半導体装置及びその製造方法 | |
| US10930619B2 (en) | Multi-wafer bonding structure and bonding method | |
| US6100573A (en) | Structure of a bonding pad for semiconductor devices | |
| JPH02285638A (ja) | 半導体装置 | |
| TWI287267B (en) | Bonding pad structure of semiconductor device and method for fabricating the same | |
| JP2022059085A (ja) | 半導体装置 | |
| JP2000340569A (ja) | 半導体装置の配線構造及びその形成方法 | |
| JPS5984551A (ja) | 半導体装置 | |
| JPH06326150A (ja) | パッド構造 | |
| JPH0645504A (ja) | 半導体装置 | |
| JPS61187262A (ja) | 半導体素子 | |
| JPH08222571A (ja) | フリップチップｉｃとその製造方法 | |
| JPS63308924A (ja) | 半導体装置 | |
| JPS6035525A (ja) | 半導体装置 | |
| JPH0462176B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| JPS6057635A (ja) | 半導体装置 | |
| TWI479617B (zh) | 半導體結構及其製造方法 | |
| JPH02161755A (ja) | 半導体装置 | |
| US20100127401A1 (en) | Semiconductor device | |
| JPS61194744A (ja) | 半導体装置 | |
| JPH08124929A (ja) | 半導体集積回路装置およびその製造方法 | |
| JPH03209823A (ja) | 樹脂封止型半導体装置 | |
| JP2800525B2 (ja) | 半導体装置 | |
| JPH05251497A (ja) | 半導体装置 | |
| JP2003100766A (ja) | 半導体装置 |