JPS5965445A - 半導体素子分離領域の形成方法 - Google Patents

半導体素子分離領域の形成方法

Info

Publication number
JPS5965445A
JPS5965445A JP17507182A JP17507182A JPS5965445A JP S5965445 A JPS5965445 A JP S5965445A JP 17507182 A JP17507182 A JP 17507182A JP 17507182 A JP17507182 A JP 17507182A JP S5965445 A JPS5965445 A JP S5965445A
Authority
JP
Japan
Prior art keywords
oxide film
film
si3n4
semiconductor substrate
isolation region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17507182A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0516173B2 (enrdf_load_stackoverflow
Inventor
Hideaki Takahashi
秀明 高橋
Ginjiro Kanbara
神原　銀次郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP17507182A priority Critical patent/JPS5965445A/ja
Publication of JPS5965445A publication Critical patent/JPS5965445A/ja
Publication of JPH0516173B2 publication Critical patent/JPH0516173B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
JP17507182A 1982-10-05 1982-10-05 半導体素子分離領域の形成方法 Granted JPS5965445A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17507182A JPS5965445A (ja) 1982-10-05 1982-10-05 半導体素子分離領域の形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17507182A JPS5965445A (ja) 1982-10-05 1982-10-05 半導体素子分離領域の形成方法

Publications (2)

Publication Number Publication Date
JPS5965445A true JPS5965445A (ja) 1984-04-13
JPH0516173B2 JPH0516173B2 (enrdf_load_stackoverflow) 1993-03-03

Family

ID=15989717

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17507182A Granted JPS5965445A (ja) 1982-10-05 1982-10-05 半導体素子分離領域の形成方法

Country Status (1)

Country Link
JP (1) JPS5965445A (enrdf_load_stackoverflow)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60257538A (ja) * 1984-05-29 1985-12-19 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 埋込酸化物層が局所的に設けられたシリコン体を有する半導体装置の製造方法
JPH01315141A (ja) * 1988-06-15 1989-12-20 Toshiba Corp 半導体装置の製造方法
US5260229A (en) * 1991-08-30 1993-11-09 Sgs-Thomson Microelectronics, Inc. Method of forming isolated regions of oxide
US5348910A (en) * 1991-12-24 1994-09-20 Seiko Epson Corporation Method of manufacturing a semiconductor device and the product thereby
JPH09181069A (ja) * 1995-11-03 1997-07-11 Hyundai Electron Ind Co Ltd 半導体装置の素子分離方法
US5834360A (en) * 1996-07-31 1998-11-10 Stmicroelectronics, Inc. Method of forming an improved planar isolation structure in an integrated circuit
US5972776A (en) * 1995-12-22 1999-10-26 Stmicroelectronics, Inc. Method of forming a planar isolation structure in an integrated circuit
US5977607A (en) * 1994-09-12 1999-11-02 Stmicroelectronics, Inc. Method of forming isolated regions of oxide
US7235460B2 (en) 1993-07-30 2007-06-26 Stmicroelectronics, Inc. Method of forming active and isolation areas with split active patterning

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779650A (en) * 1980-09-15 1982-05-18 Gen Electric Method of producing integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779650A (en) * 1980-09-15 1982-05-18 Gen Electric Method of producing integrated circuit

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60257538A (ja) * 1984-05-29 1985-12-19 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 埋込酸化物層が局所的に設けられたシリコン体を有する半導体装置の製造方法
JPH01315141A (ja) * 1988-06-15 1989-12-20 Toshiba Corp 半導体装置の製造方法
US5260229A (en) * 1991-08-30 1993-11-09 Sgs-Thomson Microelectronics, Inc. Method of forming isolated regions of oxide
US5348910A (en) * 1991-12-24 1994-09-20 Seiko Epson Corporation Method of manufacturing a semiconductor device and the product thereby
US7235460B2 (en) 1993-07-30 2007-06-26 Stmicroelectronics, Inc. Method of forming active and isolation areas with split active patterning
US5977607A (en) * 1994-09-12 1999-11-02 Stmicroelectronics, Inc. Method of forming isolated regions of oxide
JPH09181069A (ja) * 1995-11-03 1997-07-11 Hyundai Electron Ind Co Ltd 半導体装置の素子分離方法
US5972776A (en) * 1995-12-22 1999-10-26 Stmicroelectronics, Inc. Method of forming a planar isolation structure in an integrated circuit
US5834360A (en) * 1996-07-31 1998-11-10 Stmicroelectronics, Inc. Method of forming an improved planar isolation structure in an integrated circuit
US6046483A (en) * 1996-07-31 2000-04-04 Stmicroelectronics, Inc. Planar isolation structure in an integrated circuit

Also Published As

Publication number Publication date
JPH0516173B2 (enrdf_load_stackoverflow) 1993-03-03

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