JPS5927682A - デイジタル映像補正回路 - Google Patents

デイジタル映像補正回路

Info

Publication number
JPS5927682A
JPS5927682A JP57137504A JP13750482A JPS5927682A JP S5927682 A JPS5927682 A JP S5927682A JP 57137504 A JP57137504 A JP 57137504A JP 13750482 A JP13750482 A JP 13750482A JP S5927682 A JPS5927682 A JP S5927682A
Authority
JP
Japan
Prior art keywords
adder
latch
output
multiplier
digital video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57137504A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0235506B2 (cg-RX-API-DMAC7.html
Inventor
Hirohiko Sakashita
博彦 坂下
Yoshio Yasumoto
安本　吉雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57137504A priority Critical patent/JPS5927682A/ja
Publication of JPS5927682A publication Critical patent/JPS5927682A/ja
Publication of JPH0235506B2 publication Critical patent/JPH0235506B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/16—Circuitry for reinsertion of DC and slowly varying components of signal; Circuitry for preservation of black or white level

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
JP57137504A 1982-08-07 1982-08-07 デイジタル映像補正回路 Granted JPS5927682A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57137504A JPS5927682A (ja) 1982-08-07 1982-08-07 デイジタル映像補正回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57137504A JPS5927682A (ja) 1982-08-07 1982-08-07 デイジタル映像補正回路

Publications (2)

Publication Number Publication Date
JPS5927682A true JPS5927682A (ja) 1984-02-14
JPH0235506B2 JPH0235506B2 (cg-RX-API-DMAC7.html) 1990-08-10

Family

ID=15200206

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57137504A Granted JPS5927682A (ja) 1982-08-07 1982-08-07 デイジタル映像補正回路

Country Status (1)

Country Link
JP (1) JPS5927682A (cg-RX-API-DMAC7.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6248501A (ja) * 1985-08-28 1987-03-03 株式会社名南製作所 ベニヤ単板の処理装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6248501A (ja) * 1985-08-28 1987-03-03 株式会社名南製作所 ベニヤ単板の処理装置

Also Published As

Publication number Publication date
JPH0235506B2 (cg-RX-API-DMAC7.html) 1990-08-10

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