JPS59214352A - デ−タ伝送方式 - Google Patents

デ−タ伝送方式

Info

Publication number
JPS59214352A
JPS59214352A JP8666583A JP8666583A JPS59214352A JP S59214352 A JPS59214352 A JP S59214352A JP 8666583 A JP8666583 A JP 8666583A JP 8666583 A JP8666583 A JP 8666583A JP S59214352 A JPS59214352 A JP S59214352A
Authority
JP
Japan
Prior art keywords
data
address
transmission
controller
identification number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8666583A
Other languages
English (en)
Japanese (ja)
Other versions
JPH026263B2 (enExample
Inventor
Masayuki Tanimoto
谷本　雅之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Fuji Facom Corp
Original Assignee
Fuji Electric Co Ltd
Fuji Facom Corp
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Facom Corp, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP8666583A priority Critical patent/JPS59214352A/ja
Publication of JPS59214352A publication Critical patent/JPS59214352A/ja
Publication of JPH026263B2 publication Critical patent/JPH026263B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Small-Scale Networks (AREA)
  • Selective Calling Equipment (AREA)
  • Control By Computers (AREA)
  • Programmable Controllers (AREA)
JP8666583A 1983-05-19 1983-05-19 デ−タ伝送方式 Granted JPS59214352A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8666583A JPS59214352A (ja) 1983-05-19 1983-05-19 デ−タ伝送方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8666583A JPS59214352A (ja) 1983-05-19 1983-05-19 デ−タ伝送方式

Publications (2)

Publication Number Publication Date
JPS59214352A true JPS59214352A (ja) 1984-12-04
JPH026263B2 JPH026263B2 (enExample) 1990-02-08

Family

ID=13893326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8666583A Granted JPS59214352A (ja) 1983-05-19 1983-05-19 デ−タ伝送方式

Country Status (1)

Country Link
JP (1) JPS59214352A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6195030A (ja) * 1984-10-15 1986-05-13 Mitsui Toatsu Chem Inc ポリイミドフイルムの製造方法
JPS6211903A (ja) * 1985-07-10 1987-01-20 Fuji Electric Co Ltd プログラマブルコントロ−ラ

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009041052A1 (ja) 2007-09-27 2009-04-02 Oiles Corporation 合成樹脂製スラスト滑り軸受
JP5332379B2 (ja) 2008-07-28 2013-11-06 オイレス工業株式会社 合成樹脂製スラスト滑り軸受
JP5704625B2 (ja) 2009-12-11 2015-04-22 オイレス工業株式会社 合成樹脂製スラスト滑り軸受
JP6609905B2 (ja) 2014-10-27 2019-11-27 オイレス工業株式会社 合成樹脂製滑り軸受
JP2017089666A (ja) 2015-11-02 2017-05-25 オイレス工業株式会社 合成樹脂製滑り軸受

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6195030A (ja) * 1984-10-15 1986-05-13 Mitsui Toatsu Chem Inc ポリイミドフイルムの製造方法
JPS6211903A (ja) * 1985-07-10 1987-01-20 Fuji Electric Co Ltd プログラマブルコントロ−ラ

Also Published As

Publication number Publication date
JPH026263B2 (enExample) 1990-02-08

Similar Documents

Publication Publication Date Title
US4811009A (en) Transmission control system
JPS59214352A (ja) デ−タ伝送方式
JPS5948418B2 (ja) 端末制御装置
JPS5824253A (ja) パケツト合成方式
JP4774620B2 (ja) 情報通信方法及び情報通信システム
JP2543105B2 (ja) 通信制御装置
JPS6174442A (ja) 静止画受信端末のデ−タバッファ方式
JPH0279640A (ja) データ伝送装置
JPS6360428B2 (enExample)
JPH0234518B2 (enExample)
JP3250717B2 (ja) 通信処理方法及び装置
JP3233979B2 (ja) データ伝送方式
JPS6211753B2 (enExample)
JPH07143133A (ja) メモリ共用多層プロトコル処理装置
JPS6278639A (ja) メモリアクセス方式
JPH0311142B2 (enExample)
JPH0120774B2 (enExample)
JPS61264449A (ja) デ−タ受信機能を備えた情報処理装置
JPS63234749A (ja) メツセ−ジ伝送装置
JPS5847950U (ja) 電子レジスタ
JPS61108239A (ja) 通信主局権利の委譲方法
JPS61288538A (ja) 動的プロトコル・ロ−ド方式
JPS5999841A (ja) コ−ド受信装置
JPH01200448A (ja) メモリ構成設定方式
JPH04163664A (ja) 分散メモリ型の並列計算機システム