JPS59201433A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法Info
- Publication number
- JPS59201433A JPS59201433A JP7653783A JP7653783A JPS59201433A JP S59201433 A JPS59201433 A JP S59201433A JP 7653783 A JP7653783 A JP 7653783A JP 7653783 A JP7653783 A JP 7653783A JP S59201433 A JPS59201433 A JP S59201433A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- adhesive
- showing
- view
- die stage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L24/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L2224/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Die Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7653783A JPS59201433A (ja) | 1983-04-30 | 1983-04-30 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7653783A JPS59201433A (ja) | 1983-04-30 | 1983-04-30 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59201433A true JPS59201433A (ja) | 1984-11-15 |
JPH0226377B2 JPH0226377B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1990-06-08 |
Family
ID=13608014
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7653783A Granted JPS59201433A (ja) | 1983-04-30 | 1983-04-30 | 半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59201433A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014013848A1 (ja) * | 2012-07-19 | 2014-01-23 | 日産自動車株式会社 | 半導体装置 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0511740U (ja) * | 1991-07-23 | 1993-02-12 | 東洋電機製造株式会社 | 電圧抑制回路 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51121461U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1975-03-22 | 1976-10-01 | ||
JPS5684356U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1979-11-29 | 1981-07-07 | ||
JPS5844858U (ja) * | 1981-09-21 | 1983-03-25 | 日本電気株式会社 | リ−ドフレ−ム |
-
1983
- 1983-04-30 JP JP7653783A patent/JPS59201433A/ja active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51121461U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1975-03-22 | 1976-10-01 | ||
JPS5684356U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1979-11-29 | 1981-07-07 | ||
JPS5844858U (ja) * | 1981-09-21 | 1983-03-25 | 日本電気株式会社 | リ−ドフレ−ム |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014013848A1 (ja) * | 2012-07-19 | 2014-01-23 | 日産自動車株式会社 | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
JPH0226377B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1990-06-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5168926A (en) | Heat sink design integrating interface material | |
JP6041053B2 (ja) | 半導体装置及びその製造方法 | |
JP4069587B2 (ja) | 半導体チップの実装方法 | |
JPS59201433A (ja) | 半導体装置の製造方法 | |
JP2001326879A (ja) | ディスプレイドライバモジュールおよびその製造方法 | |
CN103762200A (zh) | 芯片封装件及其封装方法 | |
CN112201632A (zh) | 一种半导体器件封装结构及半导体器件封装方法 | |
JPH0410447A (ja) | Icチップ搭載基板 | |
CN1222989A (zh) | 将电子模块插入电子灵巧卡体中的方法 | |
GB2179001A (en) | Method of bonding using paste or non-dry film adhesives | |
JP2002203866A (ja) | 半導体装置製造方法 | |
JP3022910B2 (ja) | 半導体装置の製造方法 | |
JP3872218B2 (ja) | 半導体チップの実装方法 | |
JPH02177553A (ja) | 集積回路装置およびその製造方法 | |
JPS5950534A (ja) | 半導体の樹脂封止方法 | |
JPS629728Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
JPS6047430A (ja) | Lsiの樹脂封止方式 | |
JP2000222549A (ja) | 半導体集積回路チップの封止方法、半導体集積回路チップ装置及び半導体集積回路カード | |
CN103763857B (zh) | 板上芯片印刷电路板 | |
JPS63117451A (ja) | 半導体装置 | |
JPH01264230A (ja) | 半導体装置 | |
JPS62194693A (ja) | 基板付き電気電子部品 | |
JP2000174066A (ja) | 半導体装置の実装方法 | |
JPH02238640A (ja) | 半導体装置の製造方法 | |
JPH0379065A (ja) | 半導体装置用リードフレーム |