JPS59146953U - Package for semiconductors - Google Patents

Package for semiconductors

Info

Publication number
JPS59146953U
JPS59146953U JP4099183U JP4099183U JPS59146953U JP S59146953 U JPS59146953 U JP S59146953U JP 4099183 U JP4099183 U JP 4099183U JP 4099183 U JP4099183 U JP 4099183U JP S59146953 U JPS59146953 U JP S59146953U
Authority
JP
Japan
Prior art keywords
package
semiconductors
chip carrier
semiconductor
present
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4099183U
Other languages
Japanese (ja)
Inventor
早川　栄一
治 藤川
Original Assignee
イビデン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by イビデン株式会社 filed Critical イビデン株式会社
Priority to JP4099183U priority Critical patent/JPS59146953U/en
Publication of JPS59146953U publication Critical patent/JPS59146953U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来のチップキャリアの平面図、第２図及び第
３図は本考案のチップキャリアの平面図、第４図は、従
来のチップキャリアと本考案のチップキャリアとの占有
面積比較の状態を示す説明図、第５図は本考案のチップ
キャリアを４つ並列的に配置した状態の説明図、第６図
は従来のチップキャリアを４つ並列的に配置した状態の
説明図、第７図及び第８図は本考案の一態様であるチッ
プキャリアの平面図、第９図は従来の一態様であるチッ
プキャリアの平面図である。 イは半導体塔載部分、口は導体リード部、１〜１２はプ
リント配線板上のパッド。 勇６Ｚ グ／りｌＦ１ 其７Ｉ ８５ ７８Figure 1 is a plan view of a conventional chip carrier, Figures 2 and 3 are plan views of the chip carrier of the present invention, and Figure 4 is a comparison of the occupied areas between the conventional chip carrier and the chip carrier of the present invention. Fig. 5 is an explanatory diagram showing the state in which four chip carriers of the present invention are arranged in parallel; Fig. 6 is an explanatory diagram showing the state in which four conventional chip carriers are arranged in parallel; 7 and 8 are plan views of a chip carrier that is an embodiment of the present invention, and FIG. 9 is a plan view of a chip carrier that is an embodiment of the conventional technology. A is the semiconductor mounting part, the opening is the conductor lead part, and 1 to 12 are the pads on the printed wiring board. Isamu 6Z Gu/RilF1 7I 85 78

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] チップキャリア上のほぼ中央部に半導体を塔載する部分
を有し、かつ該チップキャリアの外形が円形ないし楕円
形を成している半導体用パッケージ。A semiconductor package having a portion on which a semiconductor is mounted approximately at the center of the chip carrier, and the outer shape of the chip carrier is circular or oval.
JP4099183U 1983-03-22 1983-03-22 Package for semiconductors Pending JPS59146953U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4099183U JPS59146953U (en) 1983-03-22 1983-03-22 Package for semiconductors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4099183U JPS59146953U (en) 1983-03-22 1983-03-22 Package for semiconductors

Publications (1)

Publication Number Publication Date
JPS59146953U true JPS59146953U (en) 1984-10-01

Family

ID=30171591

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4099183U Pending JPS59146953U (en) 1983-03-22 1983-03-22 Package for semiconductors

Country Status (1)

Country Link
JP (1) JPS59146953U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5927549A (en) * 1982-08-03 1984-02-14 Toshiba Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5927549A (en) * 1982-08-03 1984-02-14 Toshiba Corp Semiconductor device

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