JPS59129995A - 記憶装置 - Google Patents
記憶装置Info
- Publication number
- JPS59129995A JPS59129995A JP58004764A JP476483A JPS59129995A JP S59129995 A JPS59129995 A JP S59129995A JP 58004764 A JP58004764 A JP 58004764A JP 476483 A JP476483 A JP 476483A JP S59129995 A JPS59129995 A JP S59129995A
- Authority
- JP
- Japan
- Prior art keywords
- error
- register
- data
- section
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Detection And Correction Of Errors (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58004764A JPS59129995A (ja) | 1983-01-14 | 1983-01-14 | 記憶装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58004764A JPS59129995A (ja) | 1983-01-14 | 1983-01-14 | 記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59129995A true JPS59129995A (ja) | 1984-07-26 |
JPH0136137B2 JPH0136137B2 (enrdf_load_stackoverflow) | 1989-07-28 |
Family
ID=11592936
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58004764A Granted JPS59129995A (ja) | 1983-01-14 | 1983-01-14 | 記憶装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59129995A (enrdf_load_stackoverflow) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62251949A (ja) * | 1986-04-25 | 1987-11-02 | Mitsubishi Electric Corp | 記憶装置の誤り訂正方法 |
JP2014110071A (ja) * | 2012-11-30 | 2014-06-12 | Taiwan Semiconductor Manufactuaring Co Ltd | エラー訂正パリティビットによるmramスマートビット書き込みアルゴリズムの方法および装置 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56168266A (en) * | 1980-05-28 | 1981-12-24 | Fujitsu Ltd | Processing system for error of memory for control |
JPS5771032A (en) * | 1980-10-22 | 1982-05-01 | Nec Corp | Priority controlling circuit |
-
1983
- 1983-01-14 JP JP58004764A patent/JPS59129995A/ja active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56168266A (en) * | 1980-05-28 | 1981-12-24 | Fujitsu Ltd | Processing system for error of memory for control |
JPS5771032A (en) * | 1980-10-22 | 1982-05-01 | Nec Corp | Priority controlling circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62251949A (ja) * | 1986-04-25 | 1987-11-02 | Mitsubishi Electric Corp | 記憶装置の誤り訂正方法 |
JP2014110071A (ja) * | 2012-11-30 | 2014-06-12 | Taiwan Semiconductor Manufactuaring Co Ltd | エラー訂正パリティビットによるmramスマートビット書き込みアルゴリズムの方法および装置 |
Also Published As
Publication number | Publication date |
---|---|
JPH0136137B2 (enrdf_load_stackoverflow) | 1989-07-28 |
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