JPS59125650A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59125650A
JPS59125650A JP58000840A JP84083A JPS59125650A JP S59125650 A JPS59125650 A JP S59125650A JP 58000840 A JP58000840 A JP 58000840A JP 84083 A JP84083 A JP 84083A JP S59125650 A JPS59125650 A JP S59125650A
Authority
JP
Japan
Prior art keywords
gate electrode
polycrystalline silicon
region
film
element region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58000840A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6245708B2 (en:Method
Inventor
Hiroshi Kobayashi
博 小林
Yoshihisa Mizutani
水谷　嘉久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58000840A priority Critical patent/JPS59125650A/ja
Publication of JPS59125650A publication Critical patent/JPS59125650A/ja
Publication of JPS6245708B2 publication Critical patent/JPS6245708B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D64/0131—
    • H10D64/0132—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP58000840A 1983-01-07 1983-01-07 半導体装置の製造方法 Granted JPS59125650A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58000840A JPS59125650A (ja) 1983-01-07 1983-01-07 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58000840A JPS59125650A (ja) 1983-01-07 1983-01-07 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59125650A true JPS59125650A (ja) 1984-07-20
JPS6245708B2 JPS6245708B2 (en:Method) 1987-09-28

Family

ID=11484810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58000840A Granted JPS59125650A (ja) 1983-01-07 1983-01-07 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59125650A (en:Method)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6045053A (ja) * 1983-08-22 1985-03-11 Mitsubishi Electric Corp 半導体装置
JPH0260160A (ja) * 1988-08-26 1990-02-28 Hitachi Ltd 相補型ｍｏｓ集積回路の製造方法
JPH0432260A (ja) * 1990-05-29 1992-02-04 Oki Electric Ind Co Ltd 半導体装置及びその配線形成方法
JP2005524243A (ja) * 2002-04-30 2005-08-11 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド シリサイドを使用する金属ゲート電極およびこれを形成する方法
JP2005228761A (ja) * 2004-02-10 2005-08-25 Rohm Co Ltd 半導体装置及びその製造方法
JP2006093670A (ja) * 2004-08-25 2006-04-06 Nec Electronics Corp 半導体装置およびその製造方法
JP2006245167A (ja) * 2005-03-02 2006-09-14 Toshiba Corp 半導体装置及びその製造方法
US7187044B2 (en) * 1998-06-30 2007-03-06 Intel Corporation Complementary metal gate electrode technology
EP1782466A2 (en) * 2004-08-13 2007-05-09 Koninklijke Philips Electronics N.V. Dual gate cmos fabrication
JP2007142400A (ja) * 2005-11-15 2007-06-07 Internatl Business Mach Corp <Ibm> 半導体構造およびその形成方法（応力付加膜によりｎ型ｍｏｓｆｅｔおよびｐ型ｍｏｓｆｅｔ双方の性能を向上させる方法および構造）
JP2009503902A (ja) * 2005-08-01 2009-01-29 インターナショナル・ビジネス・マシーンズ・コーポレーション 半導体金属合金への完全変換により得られる金属ゲートｍｏｓｆｅｔ及びその製造方法
US7528450B2 (en) 2004-03-12 2009-05-05 Kabushiki Kaisha Toshiba Semiconductor device having NMOSFET and PMOSFET and manufacturing method therefor
JP2010161400A (ja) * 2010-03-11 2010-07-22 Rohm Co Ltd 半導体装置とその製造方法

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6045053A (ja) * 1983-08-22 1985-03-11 Mitsubishi Electric Corp 半導体装置
JPH0260160A (ja) * 1988-08-26 1990-02-28 Hitachi Ltd 相補型ｍｏｓ集積回路の製造方法
JPH0432260A (ja) * 1990-05-29 1992-02-04 Oki Electric Ind Co Ltd 半導体装置及びその配線形成方法
US7187044B2 (en) * 1998-06-30 2007-03-06 Intel Corporation Complementary metal gate electrode technology
JP2005524243A (ja) * 2002-04-30 2005-08-11 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド シリサイドを使用する金属ゲート電極およびこれを形成する方法
JP2005228761A (ja) * 2004-02-10 2005-08-25 Rohm Co Ltd 半導体装置及びその製造方法
US7528450B2 (en) 2004-03-12 2009-05-05 Kabushiki Kaisha Toshiba Semiconductor device having NMOSFET and PMOSFET and manufacturing method therefor
EP1782466A2 (en) * 2004-08-13 2007-05-09 Koninklijke Philips Electronics N.V. Dual gate cmos fabrication
JP2006093670A (ja) * 2004-08-25 2006-04-06 Nec Electronics Corp 半導体装置およびその製造方法
JP2006245167A (ja) * 2005-03-02 2006-09-14 Toshiba Corp 半導体装置及びその製造方法
JP2009503902A (ja) * 2005-08-01 2009-01-29 インターナショナル・ビジネス・マシーンズ・コーポレーション 半導体金属合金への完全変換により得られる金属ゲートｍｏｓｆｅｔ及びその製造方法
JP2007142400A (ja) * 2005-11-15 2007-06-07 Internatl Business Mach Corp <Ibm> 半導体構造およびその形成方法（応力付加膜によりｎ型ｍｏｓｆｅｔおよびｐ型ｍｏｓｆｅｔ双方の性能を向上させる方法および構造）
JP2010161400A (ja) * 2010-03-11 2010-07-22 Rohm Co Ltd 半導体装置とその製造方法

Also Published As

Publication number Publication date
JPS6245708B2 (en:Method) 1987-09-28

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