JPS59117151A - Mos集積回路 - Google Patents
Mos集積回路Info
- Publication number
- JPS59117151A JPS59117151A JP57232399A JP23239982A JPS59117151A JP S59117151 A JPS59117151 A JP S59117151A JP 57232399 A JP57232399 A JP 57232399A JP 23239982 A JP23239982 A JP 23239982A JP S59117151 A JPS59117151 A JP S59117151A
- Authority
- JP
- Japan
- Prior art keywords
- contact
- mos
- type
- region
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/84—Combinations of enhancement-mode IGFETs and depletion-mode IGFETs
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57232399A JPS59117151A (ja) | 1982-12-23 | 1982-12-23 | Mos集積回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57232399A JPS59117151A (ja) | 1982-12-23 | 1982-12-23 | Mos集積回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59117151A true JPS59117151A (ja) | 1984-07-06 |
| JPS6355869B2 JPS6355869B2 (enrdf_load_stackoverflow) | 1988-11-04 |
Family
ID=16938629
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57232399A Granted JPS59117151A (ja) | 1982-12-23 | 1982-12-23 | Mos集積回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59117151A (enrdf_load_stackoverflow) |
-
1982
- 1982-12-23 JP JP57232399A patent/JPS59117151A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6355869B2 (enrdf_load_stackoverflow) | 1988-11-04 |
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