JPS5887838A - 位置認識方法 - Google Patents

位置認識方法

Info

Publication number
JPS5887838A
JPS5887838A JP56185357A JP18535781A JPS5887838A JP S5887838 A JPS5887838 A JP S5887838A JP 56185357 A JP56185357 A JP 56185357A JP 18535781 A JP18535781 A JP 18535781A JP S5887838 A JPS5887838 A JP S5887838A
Authority
JP
Japan
Prior art keywords
pattern
recognition
semiconductor element
ceramic substrate
black
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56185357A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0219976B2 (enExample
Inventor
Kunio Kobayashi
邦雄 小林
Koichi Yokobori
光一 横堀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Renesas Eastern Japan Semiconductor Inc
Hitachi Iruma Electronic Co Ltd
Original Assignee
Hitachi Ltd
Hitachi Tohbu Semiconductor Ltd
Hitachi Iruma Electronic Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Tohbu Semiconductor Ltd, Hitachi Iruma Electronic Co Ltd filed Critical Hitachi Ltd
Priority to JP56185357A priority Critical patent/JPS5887838A/ja
Publication of JPS5887838A publication Critical patent/JPS5887838A/ja
Publication of JPH0219976B2 publication Critical patent/JPH0219976B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W72/50
    • H10W46/301
    • H10W46/607
    • H10W72/075
    • H10W72/07533
    • H10W72/5449
    • H10W72/5524
    • H10W72/932
    • H10W90/754

Landscapes

  • Control Of Position Or Direction (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)
JP56185357A 1981-11-20 1981-11-20 位置認識方法 Granted JPS5887838A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56185357A JPS5887838A (ja) 1981-11-20 1981-11-20 位置認識方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56185357A JPS5887838A (ja) 1981-11-20 1981-11-20 位置認識方法

Publications (2)

Publication Number Publication Date
JPS5887838A true JPS5887838A (ja) 1983-05-25
JPH0219976B2 JPH0219976B2 (enExample) 1990-05-07

Family

ID=16169367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56185357A Granted JPS5887838A (ja) 1981-11-20 1981-11-20 位置認識方法

Country Status (1)

Country Link
JP (1) JPS5887838A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62194634A (ja) * 1986-02-20 1987-08-27 Rohm Co Ltd 半導体チツプのダイボンデイング位置確認方法
JPS63155733A (ja) * 1986-12-19 1988-06-28 Fujitsu General Ltd 半導体チツプの装填方法
JPH03232300A (ja) * 1990-08-31 1991-10-16 Matsushita Electric Ind Co Ltd プリント基板

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56146242A (en) * 1980-04-16 1981-11-13 Hitachi Ltd Positioning method of bonding position at fixed position on substrate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56146242A (en) * 1980-04-16 1981-11-13 Hitachi Ltd Positioning method of bonding position at fixed position on substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62194634A (ja) * 1986-02-20 1987-08-27 Rohm Co Ltd 半導体チツプのダイボンデイング位置確認方法
JPS63155733A (ja) * 1986-12-19 1988-06-28 Fujitsu General Ltd 半導体チツプの装填方法
JPH03232300A (ja) * 1990-08-31 1991-10-16 Matsushita Electric Ind Co Ltd プリント基板

Also Published As

Publication number Publication date
JPH0219976B2 (enExample) 1990-05-07

Similar Documents

Publication Publication Date Title
US6459149B1 (en) Electronic component, communication device, and manufacturing method for electronic component
JPS5887838A (ja) 位置認識方法
JPH01119088A (ja) 表面実装部品搭載用プリント配線板
JPH05335438A (ja) リードレスチップキャリア
JPH0669638A (ja) プリント配線板のランド部構造
JPWO1997050121A1 (ja) フィルムキャリアへの導体パターンの転写方法及びそれに用いるマスク並びにフィルムキャリア
JP3070145B2 (ja) 半導体装置
JPH0677557A (ja) 混成集積回路装置
JPH065729A (ja) プリント配線板および半導体素子の位置合わせ方法
JPS6155931A (ja) 厚膜混成集積回路装置の製造方法
JP2645516B2 (ja) アイマークを備えたプリント配線板及びその製造方法
JP3119222B2 (ja) Tcp用テープ及びその製造方法並びにそのtcp用テープを用いた半導体装置
JPH0687472B2 (ja) フィルムキャリアテープ
JPH09214079A (ja) 配線基板
JPH03273654A (ja) 混成集積回路
JPS63164291A (ja) フレキシブルプリント配線板
JPS58147037A (ja) 混成集積回路
JPH0770856B2 (ja) 混成集積回路基板の位置検出方法
JPH0119396Y2 (enExample)
JPH11191598A (ja) 半導体装置及びその製造方法
JPH0964495A (ja) 位置認識マーク付配線基板および配線基板の位置認識方法
JPH06326446A (ja) 基板の製造方法及び基板
JPH02215185A (ja) 混成集積回路の製造方法
JPH05107518A (ja) 液晶表示装置およびその製造方法
JPH0520359U (ja) プリント回路基板