JPS56146242A - Positioning method of bonding position at fixed position on substrate - Google Patents

Positioning method of bonding position at fixed position on substrate

Info

Publication number
JPS56146242A
JPS56146242A JP4922380A JP4922380A JPS56146242A JP S56146242 A JPS56146242 A JP S56146242A JP 4922380 A JP4922380 A JP 4922380A JP 4922380 A JP4922380 A JP 4922380A JP S56146242 A JPS56146242 A JP S56146242A
Authority
JP
Japan
Prior art keywords
substrate
bonding position
target marks
fixed
observed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4922380A
Other languages
Japanese (ja)
Other versions
JPS6320379B2 (en
Inventor
Toshimitsu Hamada
Mikio Hongo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4922380A priority Critical patent/JPS56146242A/en
Publication of JPS56146242A publication Critical patent/JPS56146242A/en
Publication of JPS6320379B2 publication Critical patent/JPS6320379B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/788—Means for moving parts
    • H01L2224/78801—Lower part of the bonding apparatus, e.g. XY table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]

Abstract

PURPOSE:To decide a quantity of movement for making a correct bonding position by a method wherein two target marks are arranged in advance at positions designed on the substrate and said target marks are observed by image pickup units located at fixed positions. CONSTITUTION:Coordinate systems X and Y are set beforehand on the substrate, and the target marks M1, M2 are disposed at points (X1, Y1) on the coordinate systems. The bonding position in design is designed so as to be located at a point shifted from a middle point of lines linking the two points mentioned above. The substrate is fixed on an X-Y table and the M1, M2 are observed by means of the image pickup units placed at the fixed positions, and on the basis of the observation, the dislocation from the set value is calculated taking a contraction rate and inclination of the substrate into consideration. With the thus obtained value, the X-Y table is shifted to correctly fit the bonding position to the bonding position in design.
JP4922380A 1980-04-16 1980-04-16 Positioning method of bonding position at fixed position on substrate Granted JPS56146242A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4922380A JPS56146242A (en) 1980-04-16 1980-04-16 Positioning method of bonding position at fixed position on substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4922380A JPS56146242A (en) 1980-04-16 1980-04-16 Positioning method of bonding position at fixed position on substrate

Publications (2)

Publication Number Publication Date
JPS56146242A true JPS56146242A (en) 1981-11-13
JPS6320379B2 JPS6320379B2 (en) 1988-04-27

Family

ID=12824928

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4922380A Granted JPS56146242A (en) 1980-04-16 1980-04-16 Positioning method of bonding position at fixed position on substrate

Country Status (1)

Country Link
JP (1) JPS56146242A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5887838A (en) * 1981-11-20 1983-05-25 Hitachi Ltd Recognition of position
JPS58147037A (en) * 1982-02-25 1983-09-01 Fuji Electric Co Ltd Hybrid integrated circuit
JPS60262432A (en) * 1984-06-11 1985-12-25 Toshiba Corp Mounting system
JPS62155600A (en) * 1985-12-27 1987-07-10 松下電器産業株式会社 Electronic parts mounting
JPH02146832U (en) * 1990-05-10 1990-12-13
JP2015525477A (en) * 2012-06-06 2015-09-03 エーファウ・グループ・エー・タルナー・ゲーエムベーハー Apparatus and method for determining alignment error
JP2017183735A (en) * 2017-05-10 2017-10-05 エーファウ・グループ・エー・タルナー・ゲーエムベーハー Device and method for determining alignment error

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5887838A (en) * 1981-11-20 1983-05-25 Hitachi Ltd Recognition of position
JPH0219976B2 (en) * 1981-11-20 1990-05-07 Hitachi Seisakusho Kk
JPS58147037A (en) * 1982-02-25 1983-09-01 Fuji Electric Co Ltd Hybrid integrated circuit
JPH0454377B2 (en) * 1982-02-25 1992-08-31 Fuji Electric Co Ltd
JPS60262432A (en) * 1984-06-11 1985-12-25 Toshiba Corp Mounting system
JPS62155600A (en) * 1985-12-27 1987-07-10 松下電器産業株式会社 Electronic parts mounting
JPH02146832U (en) * 1990-05-10 1990-12-13
JP2015525477A (en) * 2012-06-06 2015-09-03 エーファウ・グループ・エー・タルナー・ゲーエムベーハー Apparatus and method for determining alignment error
US10134622B2 (en) 2012-06-06 2018-11-20 Ev Group E. Thallner Gmbh Apparatus and method for ascertaining orientation errors
US10410896B2 (en) 2012-06-06 2019-09-10 Ev Group E. Thallner Gmbh Apparatus and method for ascertaining orientation errors
JP2017183735A (en) * 2017-05-10 2017-10-05 エーファウ・グループ・エー・タルナー・ゲーエムベーハー Device and method for determining alignment error

Also Published As

Publication number Publication date
JPS6320379B2 (en) 1988-04-27

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