JPS58197539A - デ−タ出力制御回路 - Google Patents
デ−タ出力制御回路Info
- Publication number
- JPS58197539A JPS58197539A JP8187382A JP8187382A JPS58197539A JP S58197539 A JPS58197539 A JP S58197539A JP 8187382 A JP8187382 A JP 8187382A JP 8187382 A JP8187382 A JP 8187382A JP S58197539 A JPS58197539 A JP S58197539A
- Authority
- JP
- Japan
- Prior art keywords
- address
- signal
- data
- circuit
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Information Transfer Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8187382A JPS58197539A (ja) | 1982-05-13 | 1982-05-13 | デ−タ出力制御回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8187382A JPS58197539A (ja) | 1982-05-13 | 1982-05-13 | デ−タ出力制御回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58197539A true JPS58197539A (ja) | 1983-11-17 |
| JPS622350B2 JPS622350B2 (enrdf_load_stackoverflow) | 1987-01-19 |
Family
ID=13758574
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8187382A Granted JPS58197539A (ja) | 1982-05-13 | 1982-05-13 | デ−タ出力制御回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58197539A (enrdf_load_stackoverflow) |
-
1982
- 1982-05-13 JP JP8187382A patent/JPS58197539A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS622350B2 (enrdf_load_stackoverflow) | 1987-01-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5590363A (en) | Circuit for detection of co-processor unit presence and for correction of its absence | |
| JPS58197539A (ja) | デ−タ出力制御回路 | |
| JPS6029860A (ja) | デ−タの更新方法 | |
| JPS6329298B2 (enrdf_load_stackoverflow) | ||
| JPS635436A (ja) | 割込ベクタ発生方式 | |
| JP3224946B2 (ja) | 半導体集積回路 | |
| JPS58159282A (ja) | デ−タ出力制御回路 | |
| JPH07271553A (ja) | Fifoメモリ装置のメモリ制御方法 | |
| KR890004855Y1 (ko) | 직접 메모리 억세스 장치의 어드레스 확장회로 | |
| KR940004446A (ko) | 버스 인터페이스 장치 | |
| JPH0378196A (ja) | 半導体集積回路 | |
| JPS63229529A (ja) | 割込判別方式 | |
| JPH0378846A (ja) | メモリーの誤書込み防止回路 | |
| KR910012874A (ko) | 스눕인터페이스 서브 유니트 | |
| JPS62251941A (ja) | デ−タ処理装置 | |
| KR920022751A (ko) | 하위레벨 프로세서의 통화로계 버스 선택방법 | |
| JPH08106398A (ja) | データ変換回路 | |
| JPS5935221A (ja) | コンピユ−タシステムにおける異種ボ−ド判別方式 | |
| JPH05197623A (ja) | 主記憶アクセス方式 | |
| JPH05181784A (ja) | データ転送装置 | |
| JPH078101B2 (ja) | デイジタル形保護継電装置 | |
| JPH05128013A (ja) | パリテイ用メモリの内容表示方式 | |
| JPH04127241A (ja) | パリティ生成/チェック回路 | |
| JPH11282650A (ja) | Fifoメモリのハザード防止回路 | |
| JPH02103650A (ja) | データ処理装置 |